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| author | Max Filippov <jcmvbkbc@gmail.com> | 2014-02-15 20:58:47 +0400 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2014-02-24 04:47:02 +0400 |
| commit | 676056d4f1598f3f368da26fdc43371e8ab3a7fb (patch) | |
| tree | 690db82e98183da5baf56ddb814e2faf775bbd28 /target-xtensa/core-fsf.c | |
| parent | 2c09eee112677c64a5e060eb9d491981843d7531 (diff) | |
target-xtensa: refactor standard core configuration
Coalesce all standard configuration sections into single
DEFAULT_SECTIONS macro for all cores. This allows to add new features in
a single place: overlay_tool.h
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'target-xtensa/core-fsf.c')
| -rw-r--r-- | target-xtensa/core-fsf.c | 8 |
1 files changed, 1 insertions, 7 deletions
diff --git a/target-xtensa/core-fsf.c b/target-xtensa/core-fsf.c index d4660edde9..6859bee062 100644 --- a/target-xtensa/core-fsf.c +++ b/target-xtensa/core-fsf.c @@ -35,15 +35,9 @@ static const XtensaConfig fsf = { .name = "fsf", - .options = XTENSA_OPTIONS, /* GDB for this core is not supported currently */ - .nareg = XCHAL_NUM_AREGS, - .ndepc = 1, - EXCEPTIONS_SECTION, - INTERRUPTS_SECTION, - TLB_SECTION, - DEBUG_SECTION, .clock_freq_khz = 10000, + DEFAULT_SECTIONS }; REGISTER_CORE(fsf) |