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authorMax Filippov <jcmvbkbc@gmail.com>2014-02-11 12:22:19 +0400
committerMax Filippov <jcmvbkbc@gmail.com>2014-02-24 04:47:02 +0400
commit2c09eee112677c64a5e060eb9d491981843d7531 (patch)
tree7c3d6784b2194af380dc3331fafdc6c1dc3eb343 /target-xtensa/core-dc232b.c
parenta2e67072b7c3b2abf70d0a11918723a5dd841a05 (diff)
target-xtensa: add basic tests for cache opcodes
Test that non-locking prefetch operations don't cause exceptions on missing TLB and that other 'hit' cache operations do. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'target-xtensa/core-dc232b.c')
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