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authorAndreas Färber <afaerber@suse.de>2012-02-14 01:16:17 +0100
committerAndreas Färber <afaerber@suse.de>2012-03-30 11:09:30 +0200
commitae0f5e9ea80de923ae1c11289cf6ac468f657880 (patch)
tree030b466f08084c4634c49dc6e7375bf771f8c6f5 /target-unicore32/cpu.c
parentc3a8baa90d98edcf290bfda6850615368738a17c (diff)
target-unicore32: QOM'ify CPU
Embed CPUUniCore32State as first member of UniCore32CPU. Contributed under GPLv2+. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
Diffstat (limited to 'target-unicore32/cpu.c')
-rw-r--r--target-unicore32/cpu.c90
1 files changed, 90 insertions, 0 deletions
diff --git a/target-unicore32/cpu.c b/target-unicore32/cpu.c
new file mode 100644
index 0000000000..189b6f6b9d
--- /dev/null
+++ b/target-unicore32/cpu.c
@@ -0,0 +1,90 @@
+/*
+ * QEMU UniCore32 CPU
+ *
+ * Copyright (c) 2010-2011 GUAN Xue-tao
+ * Copyright (c) 2012 SUSE LINUX Products GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Contributions from 2012-04-01 on are considered under GPL version 2,
+ * or (at your option) any later version.
+ */
+
+#include "cpu-qom.h"
+#include "qemu-common.h"
+
+/* CPU models */
+
+typedef struct UniCore32CPUInfo {
+ const char *name;
+ void (*instance_init)(Object *obj);
+} UniCore32CPUInfo;
+
+static void unicore_ii_cpu_initfn(Object *obj)
+{
+ UniCore32CPU *cpu = UNICORE32_CPU(obj);
+ CPUUniCore32State *env = &cpu->env;
+
+ env->cp0.c0_cpuid = 0x40010863;
+}
+
+static void uc32_any_cpu_initfn(Object *obj)
+{
+ UniCore32CPU *cpu = UNICORE32_CPU(obj);
+ CPUUniCore32State *env = &cpu->env;
+
+ env->cp0.c0_cpuid = 0xffffffff;
+}
+
+static const UniCore32CPUInfo uc32_cpus[] = {
+ { .name = "UniCore-II", .instance_init = unicore_ii_cpu_initfn },
+ { .name = "any", .instance_init = uc32_any_cpu_initfn },
+};
+
+static void uc32_cpu_initfn(Object *obj)
+{
+ UniCore32CPU *cpu = UNICORE32_CPU(obj);
+ CPUUniCore32State *env = &cpu->env;
+
+ cpu_exec_init(env);
+ env->cpu_model_str = object_get_typename(obj);
+
+ env->uncached_asr = ASR_MODE_USER;
+ env->regs[31] = 0;
+
+ tlb_flush(env, 1);
+}
+
+static void uc32_register_cpu_type(const UniCore32CPUInfo *info)
+{
+ TypeInfo type_info = {
+ .name = info->name,
+ .parent = TYPE_UNICORE32_CPU,
+ .instance_init = info->instance_init,
+ };
+
+ type_register_static(&type_info);
+}
+
+static const TypeInfo uc32_cpu_type_info = {
+ .name = TYPE_UNICORE32_CPU,
+ .parent = TYPE_CPU,
+ .instance_size = sizeof(UniCore32CPU),
+ .instance_init = uc32_cpu_initfn,
+ .abstract = true,
+ .class_size = sizeof(UniCore32CPUClass),
+};
+
+static void uc32_cpu_register_types(void)
+{
+ int i;
+
+ type_register_static(&uc32_cpu_type_info);
+ for (i = 0; i < ARRAY_SIZE(uc32_cpus); i++) {
+ uc32_register_cpu_type(&uc32_cpus[i]);
+ }
+}
+
+type_init(uc32_cpu_register_types)