diff options
| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2015-08-17 17:34:10 +1000 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2015-09-11 08:15:28 -0700 |
| commit | 97ed5ccdee95f0b98bedc601ff979e368583472c (patch) | |
| tree | 5ee711528010f3700f13983b8222c2ca7ae85c83 /target-tricore | |
| parent | ba9cef7b6e487a5a8969db81d09b8eec8a2b50c6 (diff) | |
tlb: Add "ifetch" argument to cpu_mmu_index()
This is set to true when the index is for an instruction fetch
translation.
The core get_page_addr_code() sets it, as do the SOFTMMU_CODE_ACCESS
acessors.
All targets ignore it for now, and all other callers pass "false".
This will allow targets who wish to split the mmu index between
instruction and data accesses to do so. A subsequent patch will
do just that for PowerPC.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Message-Id: <1439796853-4410-2-git-send-email-benh@kernel.crashing.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-tricore')
| -rw-r--r-- | target-tricore/cpu.h | 2 | ||||
| -rw-r--r-- | target-tricore/translate.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/target-tricore/cpu.h b/target-tricore/cpu.h index 916ee27ad4..42751e8a0c 100644 --- a/target-tricore/cpu.h +++ b/target-tricore/cpu.h @@ -350,7 +350,7 @@ void tricore_cpu_list(FILE *f, fprintf_function cpu_fprintf); #define cpu_signal_handler cpu_tricore_signal_handler #define cpu_list tricore_cpu_list -static inline int cpu_mmu_index(CPUTriCoreState *env) +static inline int cpu_mmu_index(CPUTriCoreState *env, bool ifetch) { return 0; } diff --git a/target-tricore/translate.c b/target-tricore/translate.c index f02bef41ee..440f30a843 100644 --- a/target-tricore/translate.c +++ b/target-tricore/translate.c @@ -8287,7 +8287,7 @@ gen_intermediate_code_internal(TriCoreCPU *cpu, struct TranslationBlock *tb, ctx.tb = tb; ctx.singlestep_enabled = cs->singlestep_enabled; ctx.bstate = BS_NONE; - ctx.mem_idx = cpu_mmu_index(env); + ctx.mem_idx = cpu_mmu_index(env, false); tcg_clear_temp_count(); gen_tb_start(tb); |