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author | David Gibson <david@gibson.dropbear.id.au> | 2016-03-08 11:33:46 +1100 |
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committer | David Gibson <david@gibson.dropbear.id.au> | 2016-03-16 09:55:06 +1100 |
commit | e5c0d3ce40e40c903a7e65ded61d8742af947655 (patch) | |
tree | f2f856e29f9272aa3c9701ce461db751e9cbcda6 /target-tricore | |
parent | a7a00a729a98e41501904dd26e8535571b3e9579 (diff) |
target-ppc: Add helpers for updating a CPU's SDR1 and external HPT
When a Power cpu with 64-bit hash MMU has it's hash page table (HPT)
pointer updated by a write to the SDR1 register we need to update some
derived variables. Likewise, when the cpu is configured for an external
HPT (one not in the guest memory space) some derived variables need to be
updated.
Currently the logic for this is (partially) duplicated in ppc_store_sdr1()
and in spapr_cpu_reset(). In future we're going to need it in some other
places, so make some common helpers for this update.
In addition the new ppc_hash64_set_external_hpt() helper also updates
SDR1 in KVM - it's not updated by the normal runtime KVM <-> qemu CPU
synchronization. In a sense this belongs logically in the
ppc_hash64_set_sdr1() helper, but that is called from
kvm_arch_get_registers() so can't itself call cpu_synchronize_state()
without infinite recursion. In practice this doesn't matter because
the only other caller is TCG specific.
Currently there aren't situations where updating SDR1 at runtime in KVM
matters, but there are going to be in future.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Greg Kurz <gkurz@linux.vnet.ibm.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Diffstat (limited to 'target-tricore')
0 files changed, 0 insertions, 0 deletions