diff options
| author | Bastian Koppelmann <kbastian@mail.uni-paderborn.de> | 2015-05-06 20:47:39 +0200 |
|---|---|---|
| committer | Bastian Koppelmann <kbastian@mail.uni-paderborn.de> | 2015-05-22 17:02:33 +0200 |
| commit | 62872ebc38d700ea30b0cd861e40703dccdcae2a (patch) | |
| tree | 23852a8929bb0a310a4860deae4721d95382fd85 /target-tricore/tricore-opcodes.h | |
| parent | fcecf12684e1169653df72ed307ec2a82ca69b18 (diff) | |
target-tricore: add CMPSWP instructions of the v1.6.1 ISA
Those instruction were introduced in the new Aurix platform.
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-tricore/tricore-opcodes.h')
| -rw-r--r-- | target-tricore/tricore-opcodes.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/target-tricore/tricore-opcodes.h b/target-tricore/tricore-opcodes.h index 2291f75fd9..95837aa370 100644 --- a/target-tricore/tricore-opcodes.h +++ b/target-tricore/tricore-opcodes.h @@ -763,6 +763,9 @@ enum { OPC2_32_BO_SWAP_W_SHORTOFF = 0x20, OPC2_32_BO_SWAP_W_POSTINC = 0x00, OPC2_32_BO_SWAP_W_PREINC = 0x10, + OPC2_32_BO_CMPSWAP_W_SHORTOFF = 0x23, + OPC2_32_BO_CMPSWAP_W_POSTINC = 0x03, + OPC2_32_BO_CMPSWAP_W_PREINC = 0x13, }; /*OPCM_32_BO_ADDRMODE_LDMST_BITREVERSE_CIRCULAR */ enum { @@ -770,6 +773,8 @@ enum { OPC2_32_BO_LDMST_CIRC = 0x11, OPC2_32_BO_SWAP_W_BR = 0x00, OPC2_32_BO_SWAP_W_CIRC = 0x10, + OPC2_32_BO_CMPSWAP_W_BR = 0x03, + OPC2_32_BO_CMPSWAP_W_CIRC = 0x13, }; /* * BRC Format |