diff options
author | Bastian Koppelmann <kbastian@mail.uni-paderborn.de> | 2016-03-11 16:03:11 +0100 |
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committer | Bastian Koppelmann <kbastian@mail.uni-paderborn.de> | 2016-03-23 09:22:48 +0100 |
commit | 996a729f9b7f93fb921891bf0e07757a29d0c68a (patch) | |
tree | aa4f52d2b9a699187c4afc52c24258b85caf069a /target-tricore/cpu.h | |
parent | 1bd3e2fc3de683941f18e346a1793b81b20cab2d (diff) |
target-tricore: Add FPU infrastructure
This patch adds a file for all the FPU related helpers with all the includes,
useful defines, and a function to update the status bits. Additionally it adds
a mask for the rounding mode bits of PSW as well as all the opcodes for the
FPU instructions.
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-Id: <1457708597-3025-2-git-send-email-kbastian@mail.uni-paderborn.de>
Diffstat (limited to 'target-tricore/cpu.h')
-rw-r--r-- | target-tricore/cpu.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/target-tricore/cpu.h b/target-tricore/cpu.h index 5fee376674..90045a93d2 100644 --- a/target-tricore/cpu.h +++ b/target-tricore/cpu.h @@ -183,8 +183,7 @@ struct CPUTriCoreState { uint32_t M2CNT; uint32_t M3CNT; /* Floating Point Registers */ - /* XXX: */ - + float_status fp_status; /* QEMU */ int error_code; uint32_t hflags; /* CPU State */ @@ -217,6 +216,7 @@ struct CPUTriCoreState { #define MASK_PSW_GW 0x00000100 #define MASK_PSW_CDE 0x00000080 #define MASK_PSW_CDC 0x0000007f +#define MASK_PSW_FPU_RM 0x3000000 #define MASK_SYSCON_PRO_TEN 0x2 #define MASK_SYSCON_FCD_SF 0x1 @@ -339,6 +339,8 @@ enum { uint32_t psw_read(CPUTriCoreState *env); void psw_write(CPUTriCoreState *env, uint32_t val); +void fpu_set_state(CPUTriCoreState *env); + #include "cpu-qom.h" #define MMU_USER_IDX 2 |