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authorRichard Henderson <rth@twiddle.net>2015-09-23 10:12:16 -0700
committerRichard Henderson <rth@twiddle.net>2015-10-07 20:03:14 +1100
commitba1fc78f65fdea9d4b14d6449514c1351ad64fa4 (patch)
tree427dcb7fc140e7367d8f88d07cd5da58f61dde68 /target-tilegx/translate.c
parent38c949ffe7497b1d833bca5f70b22c87df9bd567 (diff)
target-tilegx: Implement crc instructions
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-tilegx/translate.c')
-rw-r--r--target-tilegx/translate.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index 6bfb1af2c8..3e5a8ea049 100644
--- a/target-tilegx/translate.c
+++ b/target-tilegx/translate.c
@@ -750,9 +750,15 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext,
case OE_RRR(CMULHR, 0, X0):
case OE_RRR(CMULH, 0, X0):
case OE_RRR(CMUL, 0, X0):
+ return TILEGX_EXCP_OPCODE_UNIMPLEMENTED;
case OE_RRR(CRC32_32, 0, X0):
+ gen_helper_crc32_32(tdest, tsrca, tsrcb);
+ mnemonic = "crc32_32";
+ break;
case OE_RRR(CRC32_8, 0, X0):
- return TILEGX_EXCP_OPCODE_UNIMPLEMENTED;
+ gen_helper_crc32_8(tdest, tsrca, tsrcb);
+ mnemonic = "crc32_8";
+ break;
case OE_RRR(DBLALIGN2, 0, X0):
case OE_RRR(DBLALIGN2, 0, X1):
gen_dblaligni(tdest, tsrca, tsrcb, 16);