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authorStefan Weil <sw@weilnetz.de>2011-10-24 22:29:48 +0200
committerBlue Swirl <blauwirbel@gmail.com>2011-10-25 19:30:00 +0000
commitf37e2a6bb3ee440219a7724722e8c0363cd5dc2e (patch)
treee62f624b58ba36846fee572d7b2d24befd92f502 /target-sparc
parentba43d28916c4f51c19bd7366089155ce81bee058 (diff)
target-sparc: Fix order of function parameters
The MinGW-w64 gcc complains about wrong parameters for gen_helper_fpadd16_s and three other functions. gen_helper_fpadd16_s is declared like this (hidden in lots of macros): static inline void gen_helper_fpadd16s(TCGv_i32 retval, TCGv_ptr arg1, TCGv_i32 arg2, TCGv_i32 arg3); So it looks like cpu_env should be the 2nd parameter. Please review this patch as I have no environment to test it (maybe the 1st parameter should be cpu_dst?). Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-sparc')
-rw-r--r--target-sparc/translate.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 214252aeb4..528ca920de 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -4017,7 +4017,7 @@ static void disas_sparc_insn(DisasContext * dc)
break;
case 0x051: /* VIS I fpadd16s */
CHECK_FPU_FEATURE(dc, VIS1);
- gen_helper_fpadd16s(cpu_env, cpu_fpr[rd],
+ gen_helper_fpadd16s(cpu_fpr[rd], cpu_env,
cpu_fpr[rs1], cpu_fpr[rs2]);
gen_update_fprs_dirty(rd);
break;
@@ -4031,7 +4031,7 @@ static void disas_sparc_insn(DisasContext * dc)
break;
case 0x053: /* VIS I fpadd32s */
CHECK_FPU_FEATURE(dc, VIS1);
- gen_helper_fpadd32s(cpu_env, cpu_fpr[rd],
+ gen_helper_fpadd32s(cpu_fpr[rd], cpu_env,
cpu_fpr[rs1], cpu_fpr[rs2]);
gen_update_fprs_dirty(rd);
break;
@@ -4045,7 +4045,7 @@ static void disas_sparc_insn(DisasContext * dc)
break;
case 0x055: /* VIS I fpsub16s */
CHECK_FPU_FEATURE(dc, VIS1);
- gen_helper_fpsub16s(cpu_env, cpu_fpr[rd],
+ gen_helper_fpsub16s(cpu_fpr[rd], cpu_env,
cpu_fpr[rs1], cpu_fpr[rs2]);
gen_update_fprs_dirty(rd);
break;
@@ -4059,7 +4059,7 @@ static void disas_sparc_insn(DisasContext * dc)
break;
case 0x057: /* VIS I fpsub32s */
CHECK_FPU_FEATURE(dc, VIS1);
- gen_helper_fpsub32s(cpu_env, cpu_fpr[rd],
+ gen_helper_fpsub32s(cpu_fpr[rd], cpu_env,
cpu_fpr[rs1], cpu_fpr[rs2]);
gen_update_fprs_dirty(rd);
break;