diff options
| author | Richard Henderson <rth@twiddle.net> | 2015-02-13 12:51:55 -0800 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2015-03-13 12:28:18 -0700 |
| commit | 42a268c241183877192c376d03bd9b6d527407c7 (patch) | |
| tree | e41a70d15c0a61d4618b08b889ab9dd56df9c35c /target-sparc | |
| parent | 3f626793a2182061e3aa50a9e2ed7a322582a60f (diff) | |
tcg: Change translator-side labels to a pointer
This is improved type checking for the translators -- it's no longer
possible to accidentally swap arguments to the branch functions.
Note that the code generating backends still manipulate labels as int.
With notable exceptions, the scope of the change is just a few lines
for each target, so it's not worth building extra machinery to do this
change in per-target increments.
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Cc: Michael Walle <michael@walle.cc>
Cc: Leon Alrae <leon.alrae@imgtec.com>
Cc: Anthony Green <green@moxielogic.com>
Cc: Jia Liu <proljc@gmail.com>
Cc: Alexander Graf <agraf@suse.de>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: Blue Swirl <blauwirbel@gmail.com>
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-sparc')
| -rw-r--r-- | target-sparc/translate.c | 11 |
1 files changed, 4 insertions, 7 deletions
diff --git a/target-sparc/translate.c b/target-sparc/translate.c index bd53950078..3708c0148e 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -945,9 +945,7 @@ static inline void gen_op_eval_fbo(TCGv dst, TCGv src, static inline void gen_branch2(DisasContext *dc, target_ulong pc1, target_ulong pc2, TCGv r_cond) { - int l1; - - l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); tcg_gen_brcondi_tl(TCG_COND_EQ, r_cond, 0, l1); @@ -960,9 +958,7 @@ static inline void gen_branch2(DisasContext *dc, target_ulong pc1, static inline void gen_branch_a(DisasContext *dc, target_ulong pc1, target_ulong pc2, TCGv r_cond) { - int l1; - - l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); tcg_gen_brcondi_tl(TCG_COND_EQ, r_cond, 0, l1); @@ -2605,7 +2601,8 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn) if (xop == 0x3a) { /* generate trap */ int cond = GET_FIELD(insn, 3, 6); TCGv_i32 trap; - int l1 = -1, mask; + TCGLabel *l1 = NULL; + int mask; if (cond == 0) { /* Trap never. */ |