diff options
| author | Richard Henderson <rth@twiddle.net> | 2012-10-05 16:55:06 -0700 |
|---|---|---|
| committer | Blue Swirl <blauwirbel@gmail.com> | 2012-10-07 16:39:33 +0000 |
| commit | 6cb675b0f89131dcb7bc4f9e0801ac7620374185 (patch) | |
| tree | 458b27c9313c23ab58fa1848c6d02c8a8a025162 /target-sparc | |
| parent | a2ea4aa9898086c1e45e1db9b5f94d16dbf0762e (diff) | |
target-sparc: Use movcond in mulscc
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-sparc')
| -rw-r--r-- | target-sparc/translate.c | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/target-sparc/translate.c b/target-sparc/translate.c index 98efb8445e..614905e1f0 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -582,22 +582,21 @@ static void gen_op_subx_int(DisasContext *dc, TCGv dst, TCGv src1, static inline void gen_op_mulscc(TCGv dst, TCGv src1, TCGv src2) { - TCGv r_temp; - int l1; + TCGv r_temp, zero; - l1 = gen_new_label(); r_temp = tcg_temp_new(); /* old op: if (!(env->y & 1)) T1 = 0; */ + zero = tcg_const_tl(0); tcg_gen_andi_tl(cpu_cc_src, src1, 0xffffffff); tcg_gen_andi_tl(r_temp, cpu_y, 0x1); tcg_gen_andi_tl(cpu_cc_src2, src2, 0xffffffff); - tcg_gen_brcondi_tl(TCG_COND_NE, r_temp, 0, l1); - tcg_gen_movi_tl(cpu_cc_src2, 0); - gen_set_label(l1); + tcg_gen_movcond_tl(TCG_COND_EQ, cpu_cc_src2, r_temp, zero, + zero, cpu_cc_src2); + tcg_temp_free(zero); // b2 = T0 & 1; // env->y = (b2 << 31) | (env->y >> 1); |