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authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2005-01-28 22:40:22 +0000
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2005-01-28 22:40:22 +0000
commit49be80301540be4445b2dc58d050a063988c85b4 (patch)
treec3e456afcd357884d9aba318b3b0328000e95557 /target-sparc
parent8df1cd076cc14d1d4fc456c6d7d1ceb257781942 (diff)
endianness fixes
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1250 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-sparc')
-rw-r--r--target-sparc/helper.c32
-rw-r--r--target-sparc/op_helper.c15
2 files changed, 18 insertions, 29 deletions
diff --git a/target-sparc/helper.c b/target-sparc/helper.c
index 5fc1da1a83..f4111b3f6b 100644
--- a/target-sparc/helper.c
+++ b/target-sparc/helper.c
@@ -129,8 +129,7 @@ int get_physical_address (CPUState *env, uint32_t *physical, int *prot,
/* SPARC reference MMU table walk: Context table->L1->L2->PTE */
/* Context base + context number */
pde_ptr = (env->mmuregs[1] << 4) + (env->mmuregs[2] << 4);
- cpu_physical_memory_read(pde_ptr, (uint8_t *)&pde, 4);
- bswap32s(&pde);
+ pde = ldl_phys(pde_ptr);
/* Ctx pde */
switch (pde & PTE_ENTRYTYPE_MASK) {
@@ -142,8 +141,7 @@ int get_physical_address (CPUState *env, uint32_t *physical, int *prot,
return 4;
case 1: /* L0 PDE */
pde_ptr = ((address >> 22) & ~3) + ((pde & ~3) << 4);
- cpu_physical_memory_read(pde_ptr, (uint8_t *)&pde, 4);
- bswap32s(&pde);
+ pde = ldl_phys(pde_ptr);
switch (pde & PTE_ENTRYTYPE_MASK) {
default:
@@ -153,8 +151,7 @@ int get_physical_address (CPUState *env, uint32_t *physical, int *prot,
return 4;
case 1: /* L1 PDE */
pde_ptr = ((address & 0xfc0000) >> 16) + ((pde & ~3) << 4);
- cpu_physical_memory_read(pde_ptr, (uint8_t *)&pde, 4);
- bswap32s(&pde);
+ pde = ldl_phys(pde_ptr);
switch (pde & PTE_ENTRYTYPE_MASK) {
default:
@@ -164,8 +161,7 @@ int get_physical_address (CPUState *env, uint32_t *physical, int *prot,
return 4;
case 1: /* L2 PDE */
pde_ptr = ((address & 0x3f000) >> 10) + ((pde & ~3) << 4);
- cpu_physical_memory_read(pde_ptr, (uint8_t *)&pde, 4);
- bswap32s(&pde);
+ pde = ldl_phys(pde_ptr);
switch (pde & PTE_ENTRYTYPE_MASK) {
default:
@@ -193,12 +189,10 @@ int get_physical_address (CPUState *env, uint32_t *physical, int *prot,
/* update page modified and dirty bits */
is_dirty = (rw & 1) && !(pde & PG_MODIFIED_MASK);
if (!(pde & PG_ACCESSED_MASK) || is_dirty) {
- uint32_t tmppde;
pde |= PG_ACCESSED_MASK;
if (is_dirty)
pde |= PG_MODIFIED_MASK;
- tmppde = bswap32(pde);
- cpu_physical_memory_write(pde_ptr, (uint8_t *)&tmppde, 4);
+ stl_phys_notdirty(pde_ptr, pde);
}
/* check access */
*access_index = ((rw & 1) << 2) | (rw & 2) | (is_user? 0 : 1);
@@ -356,8 +350,8 @@ uint32_t mmu_probe(uint32_t address, int mmulev)
/* Context base + context number */
pde_ptr = (env->mmuregs[1] << 4) + (env->mmuregs[2] << 4);
- cpu_physical_memory_read(pde_ptr, (uint8_t *)&pde, 4);
- bswap32s(&pde);
+ pde = ldl_phys(pde_ptr);
+
switch (pde & PTE_ENTRYTYPE_MASK) {
default:
case 0: /* Invalid */
@@ -368,8 +362,7 @@ uint32_t mmu_probe(uint32_t address, int mmulev)
if (mmulev == 3)
return pde;
pde_ptr = ((address >> 22) & ~3) + ((pde & ~3) << 4);
- cpu_physical_memory_read(pde_ptr, (uint8_t *)&pde, 4);
- bswap32s(&pde);
+ pde = ldl_phys(pde_ptr);
switch (pde & PTE_ENTRYTYPE_MASK) {
default:
@@ -382,8 +375,7 @@ uint32_t mmu_probe(uint32_t address, int mmulev)
if (mmulev == 2)
return pde;
pde_ptr = ((address & 0xfc0000) >> 16) + ((pde & ~3) << 4);
- cpu_physical_memory_read(pde_ptr, (uint8_t *)&pde, 4);
- bswap32s(&pde);
+ pde = ldl_phys(pde_ptr);
switch (pde & PTE_ENTRYTYPE_MASK) {
default:
@@ -396,8 +388,7 @@ uint32_t mmu_probe(uint32_t address, int mmulev)
if (mmulev == 1)
return pde;
pde_ptr = ((address & 0x3f000) >> 10) + ((pde & ~3) << 4);
- cpu_physical_memory_read(pde_ptr, (uint8_t *)&pde, 4);
- bswap32s(&pde);
+ pde = ldl_phys(pde_ptr);
switch (pde & PTE_ENTRYTYPE_MASK) {
default:
@@ -424,8 +415,7 @@ void dump_mmu(void)
printf("MMU dump:\n");
pde_ptr = (env->mmuregs[1] << 4) + (env->mmuregs[2] << 4);
- cpu_physical_memory_read(pde_ptr, (uint8_t *)&pde, 4);
- bswap32s(&pde);
+ pde = ldl_phys(pde_ptr);
printf("Root ptr: 0x%08x, ctx: %d\n", env->mmuregs[1] << 4, env->mmuregs[2]);
for (n = 0, va = 0; n < 256; n++, va += 16 * 1024 * 1024) {
pde_ptr = mmu_probe(va, 2);
diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c
index 850d8c03ea..fecb80dcdd 100644
--- a/target-sparc/op_helper.c
+++ b/target-sparc/op_helper.c
@@ -106,9 +106,9 @@ void helper_ld_asi(int asi, int size, int sign)
case 0x20 ... 0x2f: /* MMU passthrough */
cpu_physical_memory_read(T0, (void *) &ret, size);
if (size == 4)
- bswap32s(&ret);
- else if (size == 2)
- bswap16s((uint16_t *)&ret);
+ tswap32s(&ret);
+ else if (size == 2)
+ tswap16s((uint16_t *)&ret);
break;
default:
ret = 0;
@@ -170,7 +170,7 @@ void helper_st_asi(int asi, int size, int sign)
int src = T1, dst = T0;
uint8_t temp[32];
- bswap32s(&src);
+ tswap32s(&src);
cpu_physical_memory_read(src, (void *) &temp, 32);
cpu_physical_memory_write(dst, (void *) &temp, 32);
@@ -185,7 +185,7 @@ void helper_st_asi(int asi, int size, int sign)
uint64_t val;
val = (((uint64_t)T1) << 32) | T2;
- bswap64s(&val);
+ tswap64s(&val);
for (i = 0; i < 32; i += 8, dst += 8) {
cpu_physical_memory_write(dst, (void *) &val, 8);
@@ -196,10 +196,9 @@ void helper_st_asi(int asi, int size, int sign)
{
int temp = T1;
if (size == 4)
- bswap32s(&temp);
+ tswap32s(&temp);
else if (size == 2)
- bswap16s((uint16_t *)&temp);
-
+ tswap16s((uint16_t *)&temp);
cpu_physical_memory_write(T0, (void *) &temp, size);
}
return;