diff options
| author | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-09-10 20:00:18 +0000 |
|---|---|---|
| committer | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-09-10 20:00:18 +0000 |
| commit | c5d04e99f362aa4d3e9aef72bb3f867689a60dff (patch) | |
| tree | b2c915ef7215bcd67a380030c6af866c1407abd7 /target-sparc/translate.c | |
| parent | e2ea21b39660eb6938cb26a36248e23361d9534d (diff) | |
Partially convert float128 conversion ops to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5192 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-sparc/translate.c')
| -rw-r--r-- | target-sparc/translate.c | 14 |
1 files changed, 6 insertions, 8 deletions
diff --git a/target-sparc/translate.c b/target-sparc/translate.c index e36de56057..9e2c874b08 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -2511,9 +2511,9 @@ static void disas_sparc_insn(DisasContext * dc) CHECK_FPU_FEATURE(dc, FLOAT128); gen_op_load_fpr_QT1(QFPREG(rs2)); gen_clear_float_exceptions(); - tcg_gen_helper_0_0(helper_fqtos); + tcg_gen_helper_1_0(helper_fqtos, cpu_tmp32); tcg_gen_helper_0_0(helper_check_ieee_exceptions); - gen_op_store_FT0_fpr(rd); + tcg_gen_mov_i32(cpu_fpr[rd], cpu_tmp32); break; case 0xc8: gen_op_load_fpr_FT1(rs2); @@ -2535,14 +2535,12 @@ static void disas_sparc_insn(DisasContext * dc) break; case 0xcc: /* fitoq */ CHECK_FPU_FEATURE(dc, FLOAT128); - gen_op_load_fpr_FT1(rs2); - tcg_gen_helper_0_0(helper_fitoq); + tcg_gen_helper_0_1(helper_fitoq, cpu_fpr[rs2]); gen_op_store_QT0_fpr(QFPREG(rd)); break; case 0xcd: /* fstoq */ CHECK_FPU_FEATURE(dc, FLOAT128); - gen_op_load_fpr_FT1(rs2); - tcg_gen_helper_0_0(helper_fstoq); + tcg_gen_helper_0_1(helper_fstoq, cpu_fpr[rs2]); gen_op_store_QT0_fpr(QFPREG(rd)); break; case 0xce: /* fdtoq */ @@ -2569,9 +2567,9 @@ static void disas_sparc_insn(DisasContext * dc) CHECK_FPU_FEATURE(dc, FLOAT128); gen_op_load_fpr_QT1(QFPREG(rs2)); gen_clear_float_exceptions(); - tcg_gen_helper_0_0(helper_fqtoi); + tcg_gen_helper_1_0(helper_fqtoi, cpu_tmp32); tcg_gen_helper_0_0(helper_check_ieee_exceptions); - gen_op_store_FT0_fpr(rd); + tcg_gen_mov_i32(cpu_fpr[rd], cpu_tmp32); break; #ifdef TARGET_SPARC64 case 0x2: /* V9 fmovd */ |