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authorblueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>2008-07-20 18:22:16 +0000
committerblueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>2008-07-20 18:22:16 +0000
commitfb79ceb91a6ff9ee52265893f9d66dd6833726da (patch)
tree8d8b0e4c325653ca076f76edc1f81e4391ce5486 /target-sparc/translate.c
parentcb3df91a7102a79c28bb39113ef1454c342c2c7c (diff)
Make UA200x features selectable, add MMU types
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4911 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-sparc/translate.c')
-rw-r--r--target-sparc/translate.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 1ff418a4fe..3900d262d2 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -2175,6 +2175,7 @@ static void disas_sparc_insn(DisasContext * dc)
goto priv_insn;
tcg_gen_helper_1_0(helper_rdpsr, cpu_dst);
#else
+ CHECK_IU_FEATURE(dc, HYPV);
if (!hypervisor(dc))
goto priv_insn;
rs1 = GET_FIELD(insn, 13, 17);
@@ -2325,11 +2326,13 @@ static void disas_sparc_insn(DisasContext * dc)
tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
break;
case 16: // UA2005 gl
+ CHECK_IU_FEATURE(dc, GL);
tcg_gen_ld_i32(cpu_tmp32, cpu_env,
offsetof(CPUSPARCState, gl));
tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32);
break;
case 26: // UA2005 strand status
+ CHECK_IU_FEATURE(dc, HYPV);
if (!hypervisor(dc))
goto priv_insn;
tcg_gen_ld_i32(cpu_tmp32, cpu_env,
@@ -3431,11 +3434,13 @@ static void disas_sparc_insn(DisasContext * dc)
wstate));
break;
case 16: // UA2005 gl
+ CHECK_IU_FEATURE(dc, GL);
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
tcg_gen_st_i32(cpu_tmp32, cpu_env,
offsetof(CPUSPARCState, gl));
break;
case 26: // UA2005 strand status
+ CHECK_IU_FEATURE(dc, HYPV);
if (!hypervisor(dc))
goto priv_insn;
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0);
@@ -3461,6 +3466,7 @@ static void disas_sparc_insn(DisasContext * dc)
tcg_gen_st_tl(cpu_tmp0, cpu_env,
offsetof(CPUSPARCState, tbr));
#else
+ CHECK_IU_FEATURE(dc, HYPV);
if (!hypervisor(dc))
goto priv_insn;
tcg_gen_xor_tl(cpu_tmp0, cpu_src1, cpu_src2);