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authorBlue Swirl <blauwirbel@gmail.com>2009-05-10 10:38:34 +0300
committerBlue Swirl <blauwirbel@gmail.com>2009-05-10 10:38:34 +0300
commit38482a77f0b3f3147242c1f3eee573c51871b3a5 (patch)
treef28d276f491b5872388d3d48cac9ef0046508a89 /target-sparc/translate.c
parent789c91ef396252e7fedbc5c5b02b91df6daa08c3 (diff)
Convert logical operations and umul/smul
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-sparc/translate.c')
-rw-r--r--target-sparc/translate.c48
1 files changed, 24 insertions, 24 deletions
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index bbd6d9d5ad..3b3f55006b 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -3136,9 +3136,9 @@ static void disas_sparc_insn(DisasContext * dc)
tcg_gen_and_tl(cpu_dst, cpu_src1, cpu_src2);
}
if (xop & 0x10) {
- gen_op_logic_cc(cpu_dst);
- tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS);
- dc->cc_op = CC_OP_FLAGS;
+ tcg_gen_mov_tl(cpu_cc_dst, cpu_dst);
+ tcg_gen_movi_i32(cpu_cc_op, CC_OP_LOGIC);
+ dc->cc_op = CC_OP_LOGIC;
}
break;
case 0x2: /* or */
@@ -3149,9 +3149,9 @@ static void disas_sparc_insn(DisasContext * dc)
tcg_gen_or_tl(cpu_dst, cpu_src1, cpu_src2);
}
if (xop & 0x10) {
- gen_op_logic_cc(cpu_dst);
- tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS);
- dc->cc_op = CC_OP_FLAGS;
+ tcg_gen_mov_tl(cpu_cc_dst, cpu_dst);
+ tcg_gen_movi_i32(cpu_cc_op, CC_OP_LOGIC);
+ dc->cc_op = CC_OP_LOGIC;
}
break;
case 0x3: /* xor */
@@ -3162,9 +3162,9 @@ static void disas_sparc_insn(DisasContext * dc)
tcg_gen_xor_tl(cpu_dst, cpu_src1, cpu_src2);
}
if (xop & 0x10) {
- gen_op_logic_cc(cpu_dst);
- tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS);
- dc->cc_op = CC_OP_FLAGS;
+ tcg_gen_mov_tl(cpu_cc_dst, cpu_dst);
+ tcg_gen_movi_i32(cpu_cc_op, CC_OP_LOGIC);
+ dc->cc_op = CC_OP_LOGIC;
}
break;
case 0x4: /* sub */
@@ -3195,9 +3195,9 @@ static void disas_sparc_insn(DisasContext * dc)
tcg_gen_andc_tl(cpu_dst, cpu_src1, cpu_src2);
}
if (xop & 0x10) {
- gen_op_logic_cc(cpu_dst);
- tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS);
- dc->cc_op = CC_OP_FLAGS;
+ tcg_gen_mov_tl(cpu_cc_dst, cpu_dst);
+ tcg_gen_movi_i32(cpu_cc_op, CC_OP_LOGIC);
+ dc->cc_op = CC_OP_LOGIC;
}
break;
case 0x6: /* orn */
@@ -3208,9 +3208,9 @@ static void disas_sparc_insn(DisasContext * dc)
tcg_gen_orc_tl(cpu_dst, cpu_src1, cpu_src2);
}
if (xop & 0x10) {
- gen_op_logic_cc(cpu_dst);
- tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS);
- dc->cc_op = CC_OP_FLAGS;
+ tcg_gen_mov_tl(cpu_cc_dst, cpu_dst);
+ tcg_gen_movi_i32(cpu_cc_op, CC_OP_LOGIC);
+ dc->cc_op = CC_OP_LOGIC;
}
break;
case 0x7: /* xorn */
@@ -3222,9 +3222,9 @@ static void disas_sparc_insn(DisasContext * dc)
tcg_gen_xor_tl(cpu_dst, cpu_src1, cpu_tmp0);
}
if (xop & 0x10) {
- gen_op_logic_cc(cpu_dst);
- tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS);
- dc->cc_op = CC_OP_FLAGS;
+ tcg_gen_mov_tl(cpu_cc_dst, cpu_dst);
+ tcg_gen_movi_i32(cpu_cc_op, CC_OP_LOGIC);
+ dc->cc_op = CC_OP_LOGIC;
}
break;
case 0x8: /* addx, V9 addc */
@@ -3269,18 +3269,18 @@ static void disas_sparc_insn(DisasContext * dc)
CHECK_IU_FEATURE(dc, MUL);
gen_op_umul(cpu_dst, cpu_src1, cpu_src2);
if (xop & 0x10) {
- gen_op_logic_cc(cpu_dst);
- tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS);
- dc->cc_op = CC_OP_FLAGS;
+ tcg_gen_mov_tl(cpu_cc_dst, cpu_dst);
+ tcg_gen_movi_i32(cpu_cc_op, CC_OP_LOGIC);
+ dc->cc_op = CC_OP_LOGIC;
}
break;
case 0xb: /* smul */
CHECK_IU_FEATURE(dc, MUL);
gen_op_smul(cpu_dst, cpu_src1, cpu_src2);
if (xop & 0x10) {
- gen_op_logic_cc(cpu_dst);
- tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS);
- dc->cc_op = CC_OP_FLAGS;
+ tcg_gen_mov_tl(cpu_cc_dst, cpu_dst);
+ tcg_gen_movi_i32(cpu_cc_op, CC_OP_LOGIC);
+ dc->cc_op = CC_OP_LOGIC;
}
break;
case 0xc: /* subx, V9 subc */