diff options
author | Tsuneo Saito <tsnsaito@gmail.com> | 2011-07-14 18:41:38 +0900 |
---|---|---|
committer | Blue Swirl <blauwirbel@gmail.com> | 2011-07-14 15:36:10 +0000 |
commit | e1ef36c4a34082a075182ec0ba44c80a2dbf43c2 (patch) | |
tree | bad6e2ee78a026af67f82fb708f93b2015c00d19 /target-sparc/translate.c | |
parent | 8872eb4f567b9ae36dbd9c320f6a86c53a776d43 (diff) |
SPARC64: Implement stfa/stdfa/stqfa instrcutions properly
This patch implements sparcv9 stfa/stdfa/stqfa instructions
with non block-store ASIs.
Signed-off-by: Tsuneo Saito <tsnsaito@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-sparc/translate.c')
-rw-r--r-- | target-sparc/translate.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/target-sparc/translate.c b/target-sparc/translate.c index 1e7e68d397..a5a8eaf308 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -4742,12 +4742,10 @@ static void disas_sparc_insn(DisasContext * dc) r_const = tcg_const_i32(7); gen_helper_check_align(cpu_addr, r_const); tcg_temp_free_i32(r_const); - gen_op_load_fpr_QT0(QFPREG(rd)); gen_stf_asi(cpu_addr, insn, 16, QFPREG(rd)); } break; case 0x37: /* V9 stdfa */ - gen_op_load_fpr_DT0(DFPREG(rd)); gen_stf_asi(cpu_addr, insn, 8, DFPREG(rd)); break; case 0x3c: /* V9 casa */ |