diff options
| author | Blue Swirl <blauwirbel@gmail.com> | 2011-07-14 17:30:43 +0000 |
|---|---|---|
| committer | Blue Swirl <blauwirbel@gmail.com> | 2011-07-14 17:30:43 +0000 |
| commit | f838e2c535e47dc8e99ae7ec711407b849700cc9 (patch) | |
| tree | 75c5d26c91fa55ca92c997bc654ea0c1d5747081 /target-sparc/translate.c | |
| parent | d8e586ffccd73c9c7758166241564c63109fc8d3 (diff) | |
Sparc: fix FPU and AM enable checks for translation
Translation used incorrectly CPUState fields directly to check
for FPU enable state and 32 bit address masking on Sparc64.
Fix by using TB flags instead.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-sparc/translate.c')
| -rw-r--r-- | target-sparc/translate.c | 9 |
1 files changed, 2 insertions, 7 deletions
diff --git a/target-sparc/translate.c b/target-sparc/translate.c index 5f92dbb819..27c2cf98e8 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -4879,13 +4879,8 @@ static inline void gen_intermediate_code_internal(TranslationBlock * tb, dc->cc_op = CC_OP_DYNAMIC; dc->mem_idx = cpu_mmu_index(env); dc->def = env->def; - if ((dc->def->features & CPU_FEATURE_FLOAT)) - dc->fpu_enabled = cpu_fpu_enabled(env); - else - dc->fpu_enabled = 0; -#ifdef TARGET_SPARC64 - dc->address_mask_32bit = env->pstate & PS_AM; -#endif + dc->fpu_enabled = tb_fpu_enabled(tb->flags); + dc->address_mask_32bit = tb_am_enabled(tb->flags); dc->singlestep = (env->singlestep_enabled || singlestep); gen_opc_end = gen_opc_buf + OPC_MAX_SIZE; |