Fix Sparc shift ops (Aurelien Jarno)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2569 c046a42c-6fe2-441c-8c8c-71466251a162

1 files changed, 5 insertions, 2 deletions

diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 50d0875d16..70cf1bcdbc 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -1703,7 +1703,7 @@ static void disas_sparc_insn(DisasContext * dc)
 		}
 #endif
 #ifdef TARGET_SPARC64
-	    } else if (xop == 0x25) { /* sll, V9 sllx ( == sll) */
+	    } else if (xop == 0x25) { /* sll, V9 sllx */
                 rs1 = GET_FIELD(insn, 13, 17);
 		gen_movl_reg_T0(rs1);
 		if (IS_IMM) {	/* immediate */
@@ -1713,7 +1713,10 @@ static void disas_sparc_insn(DisasContext * dc)
                     rs2 = GET_FIELD(insn, 27, 31);
                     gen_movl_reg_T1(rs2);
                 }
-		gen_op_sll();
+		if (insn & (1 << 12))
+		    gen_op_sllx();
+		else
+		    gen_op_sll();
 		gen_movl_T0_reg(rd);
 	    } else if (xop == 0x26) { /* srl, V9 srlx */
                 rs1 = GET_FIELD(insn, 13, 17);