diff options
| author | Richard Henderson <rth@twiddle.net> | 2015-08-24 20:51:21 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2016-07-12 11:01:55 -0700 |
| commit | 99a230638a3674e921224dbe628159c867d734b1 (patch) | |
| tree | d6f559df58c1ac3b7eb9e0f88b2867c99bfa70c5 /target-sparc/translate.c | |
| parent | e86ceb0d652baa5738e05a59ee0e7989dafbeaa1 (diff) | |
target-sparc: Store mmu index in TB flags
Doing this instead of saving the raw PS_PRIV and TL. This means
that all nucleus mode TBs (TL > 0) can be shared. This fixes a
bug in that we didn't include HS_PRIV in the TB flags, and so could
produce incorrect TB matches for hypervisor state.
The LSU and DMMU states were unused by the translator. Including
them in TB flags meant unnecessary mismatches from tb_find_fast.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-sparc/translate.c')
| -rw-r--r-- | target-sparc/translate.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-sparc/translate.c b/target-sparc/translate.c index fc220ed64e..9000e9b9f5 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -5248,7 +5248,7 @@ void gen_intermediate_code(CPUSPARCState * env, TranslationBlock * tb) last_pc = dc->pc; dc->npc = (target_ulong) tb->cs_base; dc->cc_op = CC_OP_DYNAMIC; - dc->mem_idx = cpu_mmu_index(env, false); + dc->mem_idx = tb->flags & TB_FLAG_MMU_MASK; dc->def = env->def; dc->fpu_enabled = tb_fpu_enabled(tb->flags); dc->address_mask_32bit = tb_am_enabled(tb->flags); |