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authorblueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>2008-03-21 18:08:59 +0000
committerblueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>2008-03-21 18:08:59 +0000
commit2b29924f8c65fda8047e5c19f616ac5617b75a14 (patch)
tree53e89c79e53cc37ed97b3591c2d639117c3fba30 /target-sparc/translate.c
parent2be17ebded1eb5add24674cc88e4833d5afaa980 (diff)
Convert align checks to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4097 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-sparc/translate.c')
-rw-r--r--target-sparc/translate.c20
1 files changed, 20 insertions, 0 deletions
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 69ce4cbfff..eb1906d682 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -1664,6 +1664,26 @@ static inline void gen_clear_float_exceptions(void)
tcg_gen_helper_0_0(helper_clear_float_exceptions);
}
+static inline void gen_check_align(TCGv r_addr, int align)
+{
+ tcg_gen_helper_0_2(helper_check_align, r_addr, tcg_const_i32(align));
+}
+
+static inline void gen_op_check_align_T0_1(void)
+{
+ gen_check_align(cpu_T[0], 1);
+}
+
+static inline void gen_op_check_align_T0_3(void)
+{
+ gen_check_align(cpu_T[0], 3);
+}
+
+static inline void gen_op_check_align_T0_7(void)
+{
+ gen_check_align(cpu_T[0], 7);
+}
+
/* asi moves */
#ifdef TARGET_SPARC64
static inline TCGv gen_get_asi(int insn, TCGv r_addr)