diff options
| author | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-08-29 21:03:31 +0000 |
|---|---|---|
| committer | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-08-29 21:03:31 +0000 |
| commit | ba6a9d8cdaffda76c9a8e28dc3d7b8363b48d904 (patch) | |
| tree | ebb14dbf24276f51cd23af9a7dd1acbe971fe173 /target-sparc/translate.c | |
| parent | 91736d378b9bc6a9d7e16556216c919ba21dc5ca (diff) | |
Fix FCC handling for Sparc64 target, initial patch by Vince Weaver
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5110 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-sparc/translate.c')
| -rw-r--r-- | target-sparc/translate.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/target-sparc/translate.c b/target-sparc/translate.c index a6f69a150c..be11f7d65e 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -999,16 +999,14 @@ static inline void gen_op_eval_bvc(TCGv dst, TCGv src) static inline void gen_mov_reg_FCC0(TCGv reg, TCGv src, unsigned int fcc_offset) { - tcg_gen_extu_i32_tl(reg, src); - tcg_gen_shri_tl(reg, reg, FSR_FCC0_SHIFT + fcc_offset); + tcg_gen_shri_tl(reg, src, FSR_FCC0_SHIFT + fcc_offset); tcg_gen_andi_tl(reg, reg, 0x1); } static inline void gen_mov_reg_FCC1(TCGv reg, TCGv src, unsigned int fcc_offset) { - tcg_gen_extu_i32_tl(reg, src); - tcg_gen_shri_tl(reg, reg, FSR_FCC1_SHIFT + fcc_offset); + tcg_gen_shri_tl(reg, src, FSR_FCC1_SHIFT + fcc_offset); tcg_gen_andi_tl(reg, reg, 0x1); } |