diff options
author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2004-10-03 15:07:13 +0000 |
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committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2004-10-03 15:07:13 +0000 |
commit | b769d8fef6c06ddb39ef0337882a4f8872b9c2bc (patch) | |
tree | f66f789f12d413c07036e7a0dd5f63e425743d65 /target-sparc/cpu.h | |
parent | 32ff25bf68e687a6c15bfef2d855faccb2740472 (diff) |
removed access_type hack
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1095 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-sparc/cpu.h')
-rw-r--r-- | target-sparc/cpu.h | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index ec9bba76a6..4c23b924a4 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -86,10 +86,6 @@ #define PG_MODIFIED_MASK (1 << PG_MODIFIED_BIT) #define PG_CACHE_MASK (1 << PG_CACHE_BIT) -#define ACCESS_DATA 0 -#define ACCESS_CODE 1 -#define ACCESS_MMU 2 - #define NWINDOWS 32 typedef struct CPUSPARCState { @@ -131,7 +127,6 @@ typedef struct CPUSPARCState { CPUTLBEntry tlb_read[2][CPU_TLB_SIZE]; CPUTLBEntry tlb_write[2][CPU_TLB_SIZE]; int error_code; - int access_type; /* MMU regs */ uint32_t mmuregs[16]; /* temporary float registers */ |