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authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2004-01-04 15:01:44 +0000
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2004-01-04 15:01:44 +0000
commitcf495bcf9ffe0f1450a5de7497612dd1be23ff2a (patch)
tree3c0be857e4ea42a1486baea26302eca03dbfdbf6 /target-sparc/cpu.h
parentfb0eaffc6d9982b5eee439b8461851bd18bf35ce (diff)
SPARC fixes: corrected PC/NPC logic (now slower but can be optimized a lot) - fixed flags computations - added register window exceptions support - fixed mul and div - added mulscc - fixed immediate field decoding
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@484 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-sparc/cpu.h')
-rw-r--r--target-sparc/cpu.h45
1 files changed, 29 insertions, 16 deletions
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index 350d7b719c..67fece7127 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -7,29 +7,42 @@
/*#define EXCP_INTERRUPT 0x100*/
+/* trap definitions */
+#define TT_ILL_INSN 0x02
+#define TT_WIN_OVF 0x05
+#define TT_WIN_UNF 0x06
+#define TT_DIV_ZERO 0x2a
+#define TT_TRAP 0x80
#define PSR_NEG (1<<23)
#define PSR_ZERO (1<<22)
#define PSR_OVF (1<<21)
#define PSR_CARRY (1<<20)
+#define NWINDOWS 32
+
typedef struct CPUSPARCState {
- uint32_t gregs[8]; /* general registers */
- uint32_t *regwptr; /* pointer to current register window */
- double *regfptr; /* floating point registers */
- uint32_t pc; /* program counter */
- uint32_t npc; /* next program counter */
- uint32_t sp; /* stack pointer */
- uint32_t y; /* multiply/divide register */
- uint32_t psr; /* processor state register */
- uint32_t T2;
- jmp_buf jmp_env;
- int user_mode_only;
- int exception_index;
- int interrupt_index;
- int interrupt_request;
- struct TranslationBlock *current_tb;
- void *opaque;
+ uint32_t gregs[8]; /* general registers */
+ uint32_t *regwptr; /* pointer to current register window */
+ double *regfptr; /* floating point registers */
+ uint32_t pc; /* program counter */
+ uint32_t npc; /* next program counter */
+ uint32_t sp; /* stack pointer */
+ uint32_t y; /* multiply/divide register */
+ uint32_t psr; /* processor state register */
+ uint32_t T2;
+ uint32_t cwp; /* index of current register window (extracted
+ from PSR) */
+ uint32_t wim; /* window invalid mask */
+ jmp_buf jmp_env;
+ int user_mode_only;
+ int exception_index;
+ int interrupt_index;
+ int interrupt_request;
+ struct TranslationBlock *current_tb;
+ void *opaque;
+ /* NOTE: we allow 8 more registers to handle wrapping */
+ uint32_t regbase[NWINDOWS * 16 + 8];
} CPUSPARCState;
CPUSPARCState *cpu_sparc_init(void);