diff options
author | Avi Kivity <avi@redhat.com> | 2012-10-23 12:30:10 +0200 |
---|---|---|
committer | Anthony Liguori <aliguori@us.ibm.com> | 2012-10-23 08:58:25 -0500 |
commit | a8170e5e97ad17ca169c64ba87ae2f53850dab4c (patch) | |
tree | 51182ed444f0d2bf282f6bdacef43f32e5adaadf /target-sh4/helper.c | |
parent | 50d2b4d93f45a425f15ac88bc4ec352f5c6e0bc2 (diff) |
Rename target_phys_addr_t to hwaddr
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are
reserved) and its purpose doesn't match the name (most target_phys_addr_t
addresses are not target specific). Replace it with a finger-friendly,
standards conformant hwaddr.
Outstanding patchsets can be fixed up with the command
git rebase -i --exec 'find -name "*.[ch]"
| xargs s/target_phys_addr_t/hwaddr/g' origin
Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'target-sh4/helper.c')
-rw-r--r-- | target-sh4/helper.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/target-sh4/helper.c b/target-sh4/helper.c index 5c57380f12..ddebc78964 100644 --- a/target-sh4/helper.c +++ b/target-sh4/helper.c @@ -503,7 +503,7 @@ int cpu_sh4_handle_mmu_fault(CPUSH4State * env, target_ulong address, int rw, return 0; } -target_phys_addr_t cpu_get_phys_page_debug(CPUSH4State * env, target_ulong addr) +hwaddr cpu_get_phys_page_debug(CPUSH4State * env, target_ulong addr) { target_ulong physical; int prot; @@ -574,7 +574,7 @@ void cpu_load_tlb(CPUSH4State * env) } uint32_t cpu_sh4_read_mmaped_itlb_addr(CPUSH4State *s, - target_phys_addr_t addr) + hwaddr addr) { int index = (addr & 0x00000300) >> 8; tlb_t * entry = &s->itlb[index]; @@ -584,7 +584,7 @@ uint32_t cpu_sh4_read_mmaped_itlb_addr(CPUSH4State *s, (entry->asid); } -void cpu_sh4_write_mmaped_itlb_addr(CPUSH4State *s, target_phys_addr_t addr, +void cpu_sh4_write_mmaped_itlb_addr(CPUSH4State *s, hwaddr addr, uint32_t mem_value) { uint32_t vpn = (mem_value & 0xfffffc00) >> 10; @@ -604,7 +604,7 @@ void cpu_sh4_write_mmaped_itlb_addr(CPUSH4State *s, target_phys_addr_t addr, } uint32_t cpu_sh4_read_mmaped_itlb_data(CPUSH4State *s, - target_phys_addr_t addr) + hwaddr addr) { int array = (addr & 0x00800000) >> 23; int index = (addr & 0x00000300) >> 8; @@ -626,7 +626,7 @@ uint32_t cpu_sh4_read_mmaped_itlb_data(CPUSH4State *s, } } -void cpu_sh4_write_mmaped_itlb_data(CPUSH4State *s, target_phys_addr_t addr, +void cpu_sh4_write_mmaped_itlb_data(CPUSH4State *s, hwaddr addr, uint32_t mem_value) { int array = (addr & 0x00800000) >> 23; @@ -655,7 +655,7 @@ void cpu_sh4_write_mmaped_itlb_data(CPUSH4State *s, target_phys_addr_t addr, } uint32_t cpu_sh4_read_mmaped_utlb_addr(CPUSH4State *s, - target_phys_addr_t addr) + hwaddr addr) { int index = (addr & 0x00003f00) >> 8; tlb_t * entry = &s->utlb[index]; @@ -667,7 +667,7 @@ uint32_t cpu_sh4_read_mmaped_utlb_addr(CPUSH4State *s, (entry->asid); } -void cpu_sh4_write_mmaped_utlb_addr(CPUSH4State *s, target_phys_addr_t addr, +void cpu_sh4_write_mmaped_utlb_addr(CPUSH4State *s, hwaddr addr, uint32_t mem_value) { int associate = addr & 0x0000080; @@ -740,7 +740,7 @@ void cpu_sh4_write_mmaped_utlb_addr(CPUSH4State *s, target_phys_addr_t addr, } uint32_t cpu_sh4_read_mmaped_utlb_data(CPUSH4State *s, - target_phys_addr_t addr) + hwaddr addr) { int array = (addr & 0x00800000) >> 23; int index = (addr & 0x00003f00) >> 8; @@ -766,7 +766,7 @@ uint32_t cpu_sh4_read_mmaped_utlb_data(CPUSH4State *s, } } -void cpu_sh4_write_mmaped_utlb_data(CPUSH4State *s, target_phys_addr_t addr, +void cpu_sh4_write_mmaped_utlb_data(CPUSH4State *s, hwaddr addr, uint32_t mem_value) { int array = (addr & 0x00800000) >> 23; |