diff options
author | Richard Henderson <rth@twiddle.net> | 2012-08-22 14:17:58 -0700 |
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committer | Richard Henderson <rth@twiddle.net> | 2013-01-05 12:18:40 -0800 |
commit | 504488b82770e053aa31861fd7ef31afdb874f27 (patch) | |
tree | a3e8098547d7edf7b84cca87af6192dcf3b1e32d /target-s390x | |
parent | ea20490fdd9faacf9768363edcda3c76fed703ab (diff) |
target-s390: Convert LCTL, STCTL
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-s390x')
-rw-r--r-- | target-s390x/insn-data.def | 4 | ||||
-rw-r--r-- | target-s390x/translate.c | 54 |
2 files changed, 28 insertions, 30 deletions
diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def index 819c3f5274..6fff22aa5a 100644 --- a/target-s390x/insn-data.def +++ b/target-s390x/insn-data.def @@ -465,6 +465,8 @@ #ifndef CONFIG_USER_ONLY /* DIAGNOSE (KVM hypercall) */ C(0x8300, DIAG, RX_a, Z, 0, 0, 0, 0, diag, 0) +/* LOAD CONTROL */ + C(0xb700, LCTL, RS_a, Z, 0, a2, 0, 0, lctl, 0) /* LOAD PSW */ C(0x8200, LPSW, S, Z, 0, a2, 0, 0, lpsw, 0) /* LOAD REAL ADDRESS */ @@ -483,6 +485,8 @@ C(0x8000, SSM, S, Z, 0, m2_8u, 0, 0, ssm, 0) /* SIGNAL PROCESSOR */ C(0xae00, SIGP, RS_a, Z, r3_o, a2, 0, 0, sigp, 0) +/* STORE CONTROL */ + C(0xb600, STCTL, RS_a, Z, 0, a2, 0, 0, stctl, 0) /* STORE THEN AND SYSTEM MASK */ C(0xac00, STNSM, SI, Z, la1, 0, 0, 0, stnosm, 0) /* STORE THEN OR SYSTEM MASK */ diff --git a/target-s390x/translate.c b/target-s390x/translate.c index 9e648d62d2..265fc26800 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -2014,36 +2014,6 @@ static void disas_s390_insn(CPUS390XState *env, DisasContext *s) r2 = insn & 0xf; disas_b3(env, s, op, r3, r1, r2); break; -#ifndef CONFIG_USER_ONLY - case 0xb6: /* STCTL R1,R3,D2(B2) [RS] */ - /* Store Control */ - check_privileged(s); - insn = ld_code4(env, s->pc); - decode_rs(s, insn, &r1, &r3, &b2, &d2); - tmp = get_address(s, 0, b2, d2); - tmp32_1 = tcg_const_i32(r1); - tmp32_2 = tcg_const_i32(r3); - potential_page_fault(s); - gen_helper_stctl(cpu_env, tmp32_1, tmp, tmp32_2); - tcg_temp_free_i64(tmp); - tcg_temp_free_i32(tmp32_1); - tcg_temp_free_i32(tmp32_2); - break; - case 0xb7: /* LCTL R1,R3,D2(B2) [RS] */ - /* Load Control */ - check_privileged(s); - insn = ld_code4(env, s->pc); - decode_rs(s, insn, &r1, &r3, &b2, &d2); - tmp = get_address(s, 0, b2, d2); - tmp32_1 = tcg_const_i32(r1); - tmp32_2 = tcg_const_i32(r3); - potential_page_fault(s); - gen_helper_lctl(cpu_env, tmp32_1, tmp, tmp32_2); - tcg_temp_free_i64(tmp); - tcg_temp_free_i32(tmp32_1); - tcg_temp_free_i32(tmp32_2); - break; -#endif case 0xb9: insn = ld_code4(env, s->pc); r1 = (insn >> 4) & 0xf; @@ -2894,6 +2864,18 @@ static ExitStatus op_ld64(DisasContext *s, DisasOps *o) } #ifndef CONFIG_USER_ONLY +static ExitStatus op_lctl(DisasContext *s, DisasOps *o) +{ + TCGv_i32 r1 = tcg_const_i32(get_field(s->fields, r1)); + TCGv_i32 r3 = tcg_const_i32(get_field(s->fields, r3)); + check_privileged(s); + potential_page_fault(s); + gen_helper_lctl(cpu_env, r1, o->in2, r3); + tcg_temp_free_i32(r1); + tcg_temp_free_i32(r3); + return NO_EXIT; +} + static ExitStatus op_lra(DisasContext *s, DisasOps *o) { check_privileged(s); @@ -3213,6 +3195,18 @@ static ExitStatus op_ssm(DisasContext *s, DisasOps *o) return NO_EXIT; } +static ExitStatus op_stctl(DisasContext *s, DisasOps *o) +{ + TCGv_i32 r1 = tcg_const_i32(get_field(s->fields, r1)); + TCGv_i32 r3 = tcg_const_i32(get_field(s->fields, r3)); + check_privileged(s); + potential_page_fault(s); + gen_helper_stctl(cpu_env, r1, o->in2, r3); + tcg_temp_free_i32(r1); + tcg_temp_free_i32(r3); + return NO_EXIT; +} + static ExitStatus op_stnosm(DisasContext *s, DisasOps *o) { uint64_t i2 = get_field(s->fields, i2); |