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authorBlue Swirl <blauwirbel@gmail.com>2012-06-24 07:09:30 +0000
committerBlue Swirl <blauwirbel@gmail.com>2012-06-24 07:09:30 +0000
commit99918cec1968b94c8ac3afe51b2a34e5c78c81b3 (patch)
tree6c6d23e107bfff988b9c9f442935584322f9ddc9 /target-s390x
parentaffe5189907f397514cdd4ee7446595c1246a0e9 (diff)
parent5e87975c87b35c66be3f33080c0e5cf6c6d451a5 (diff)
Merge branch 'arm-devs.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm
* 'arm-devs.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm: arm_boot: Conditionalised DTB command line update cadence_ttc: changed master clock frequency cadence_gem: avoid stack-writing buffer-overrun hw/a9mpcore: Fix compilation failure if physaddrs are 64 bit hw/omap.h: Drop broken MEM_VERBOSE tracing hw/armv7m_nvic: Make the NVIC a freestanding class hw/arm_gic: Move CPU interface memory region setup into arm_gic_init hw/arm_gic.c: Make NVIC interrupt numbering a runtime setting hw/arm_gic: Make CPU target registers RAZ/WI on uniprocessor hw/arm_gic: Add qdev property for GIC revision hw/armv7m_nvic: Use MemoryRegions for NVIC specific registers hw/arm_gic: Move NVIC specific reset to armv7m_nvic_reset hw/arm_gic: Remove the special casing of NCPU for the NVIC hw/arm_gic: Remove NVIC ifdefs from gic_state struct arm_boot: Fix typos in comment ARM: Exynos4210 IRQ: Introduce new IRQ gate functionality.
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