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authorAurelien Jarno <aurelien@aurel32.net>2015-05-25 01:47:31 +0200
committerAlexander Graf <agraf@suse.de>2015-06-05 01:37:58 +0200
commita1c7610a68795d66249c25166220324d4d0b9289 (patch)
treed5612b5fa793e129b5443889005828cfe36efaba /target-s390x/translate.c
parent92892330e78ffca7bebf03f4f7161c5bbd6602d2 (diff)
target-s390x: implement LAY and LAEY instructions
This complete the general-instructions-extension facility, enable it. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> [agraf: remove facility bit] Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-s390x/translate.c')
-rw-r--r--target-s390x/translate.c35
1 files changed, 35 insertions, 0 deletions
diff --git a/target-s390x/translate.c b/target-s390x/translate.c
index 63885f8b6c..d508bc2b54 100644
--- a/target-s390x/translate.c
+++ b/target-s390x/translate.c
@@ -2596,6 +2596,41 @@ static ExitStatus op_mov2(DisasContext *s, DisasOps *o)
return NO_EXIT;
}
+static ExitStatus op_mov2e(DisasContext *s, DisasOps *o)
+{
+ int b2 = get_field(s->fields, b2);
+ TCGv ar1 = tcg_temp_new_i64();
+
+ o->out = o->in2;
+ o->g_out = o->g_in2;
+ TCGV_UNUSED_I64(o->in2);
+ o->g_in2 = false;
+
+ switch (s->tb->flags & FLAG_MASK_ASC) {
+ case PSW_ASC_PRIMARY >> 32:
+ tcg_gen_movi_i64(ar1, 0);
+ break;
+ case PSW_ASC_ACCREG >> 32:
+ tcg_gen_movi_i64(ar1, 1);
+ break;
+ case PSW_ASC_SECONDARY >> 32:
+ if (b2) {
+ tcg_gen_ld32u_i64(ar1, cpu_env, offsetof(CPUS390XState, aregs[b2]));
+ } else {
+ tcg_gen_movi_i64(ar1, 0);
+ }
+ break;
+ case PSW_ASC_HOME >> 32:
+ tcg_gen_movi_i64(ar1, 2);
+ break;
+ }
+
+ tcg_gen_st32_i64(ar1, cpu_env, offsetof(CPUS390XState, aregs[1]));
+ tcg_temp_free_i64(ar1);
+
+ return NO_EXIT;
+}
+
static ExitStatus op_movx(DisasContext *s, DisasOps *o)
{
o->out = o->in1;