diff options
author | Richard Henderson <rth@twiddle.net> | 2012-09-10 16:26:35 -0700 |
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committer | Richard Henderson <rth@twiddle.net> | 2013-01-05 12:18:45 -0800 |
commit | a12000b9ece917f62d6405e7ee83c8abb6ad7afa (patch) | |
tree | 36d3f9998b29b019e86dfdf59031719cb7c85304 /target-s390x/translate.c | |
parent | d2d9feac6fa9f6fd40e8f251bcfdd9a9a0f421f8 (diff) |
target-s390: Implement SET ROUNDING MODE
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-s390x/translate.c')
-rw-r--r-- | target-s390x/translate.c | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/target-s390x/translate.c b/target-s390x/translate.c index b4dd68e3f5..c4d9fffa21 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -2921,6 +2921,45 @@ static ExitStatus op_sfpc(DisasContext *s, DisasOps *o) return NO_EXIT; } +static ExitStatus op_srnm(DisasContext *s, DisasOps *o) +{ + int b2 = get_field(s->fields, b2); + int d2 = get_field(s->fields, d2); + TCGv_i64 t1 = tcg_temp_new_i64(); + TCGv_i64 t2 = tcg_temp_new_i64(); + int mask, pos, len; + + switch (s->fields->op2) { + case 0x99: /* SRNM */ + pos = 0, len = 2; + break; + case 0xb8: /* SRNMB */ + pos = 0, len = 3; + break; + case 0xb9: /* SRNMT */ + pos = 4, len = 3; + default: + tcg_abort(); + } + mask = (1 << len) - 1; + + /* Insert the value into the appropriate field of the FPC. */ + if (b2 == 0) { + tcg_gen_movi_i64(t1, d2 & mask); + } else { + tcg_gen_addi_i64(t1, regs[b2], d2); + tcg_gen_andi_i64(t1, t1, mask); + } + tcg_gen_ld32u_i64(t2, cpu_env, offsetof(CPUS390XState, fpc)); + tcg_gen_deposit_i64(t2, t2, t1, pos, len); + tcg_temp_free_i64(t1); + + /* Then install the new FPC to set the rounding mode in fpu_status. */ + gen_helper_sfpc(cpu_env, t2); + tcg_temp_free_i64(t2); + return NO_EXIT; +} + #ifndef CONFIG_USER_ONLY static ExitStatus op_spka(DisasContext *s, DisasOps *o) { |