diff options
author | Aurelien Jarno <aurelien@aurel32.net> | 2015-06-03 23:09:50 +0200 |
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committer | Alexander Graf <agraf@suse.de> | 2015-06-05 01:37:59 +0200 |
commit | 375ee58bedcda359011fe7fa99e0647f66f9ffa0 (patch) | |
tree | 3496a4d27e8bc03b22ff7e5408724e67c9d1f5b2 /target-s390x/insn-data.def | |
parent | df46283ce7be962002a30140a91ffbb56832cc2d (diff) |
target-s390x: implement miscellaneous-instruction-extensions facility
RISBGN is the same as RISBG, but without setting the condition code.
CLT and CLGT are the same as CLRT and CLGRT, but using memory for the
second operand.
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-s390x/insn-data.def')
-rw-r--r-- | target-s390x/insn-data.def | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def index 41b5f43d53..ddc6337584 100644 --- a/target-s390x/insn-data.def +++ b/target-s390x/insn-data.def @@ -230,6 +230,8 @@ /* COMPARE LOGICAL AND TRAP */ D(0xb973, CLRT, RRF_c, GIE, r1_32u, r2_32u, 0, 0, ct, 0, 1) D(0xb961, CLGRT, RRF_c, GIE, r1_o, r2_o, 0, 0, ct, 0, 1) + D(0xeb23, CLT, RSY_b, MIE, r1_32u, m2_32u, 0, 0, ct, 0, 1) + D(0xeb2b, CLGT, RSY_b, MIE, r1_o, m2_64, 0, 0, ct, 0, 1) D(0xec73, CLFIT, RIE_a, GIE, r1_32u, i2_32u, 0, 0, ct, 0, 1) D(0xec71, CLGIT, RIE_a, GIE, r1_o, i2_32u, 0, 0, ct, 0, 1) @@ -604,6 +606,7 @@ /* ROTATE THEN INSERT SELECTED BITS */ C(0xec55, RISBG, RIE_f, GIE, 0, r2, r1, 0, risbg, s64) + C(0xec59, RISBGN, RIE_f, MIE, 0, r2, r1, 0, risbg, 0) C(0xec5d, RISBHG, RIE_f, HW, 0, r2, r1, 0, risbg, 0) C(0xec51, RISBLG, RIE_f, HW, 0, r2, r1, 0, risbg, 0) /* ROTATE_THEN <OP> SELECTED BITS */ |