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authorAurelien Jarno <aurelien@aurel32.net>2015-06-13 00:45:53 +0200
committerAlexander Graf <agraf@suse.de>2015-06-17 12:40:51 +0200
commitfb01bf4c6b86d9ac00ea87d60f97871ee1488188 (patch)
tree2e5b4631d1195b1fdbecc33234b366de88124463 /target-s390x/cpu.h
parent6da528d14de29138ca5ac43d6d059889dd24f464 (diff)
target-s390x: add PER related constants
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-s390x/cpu.h')
-rw-r--r--target-s390x/cpu.h16
1 files changed, 16 insertions, 0 deletions
diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h
index 66bd63900a..c18d81b4c4 100644
--- a/target-s390x/cpu.h
+++ b/target-s390x/cpu.h
@@ -364,6 +364,22 @@ static inline int get_ilen(uint8_t opc)
}
}
+/* PER bits from control register 9 */
+#define PER_CR9_EVENT_BRANCH 0x80000000
+#define PER_CR9_EVENT_IFETCH 0x40000000
+#define PER_CR9_EVENT_STORE 0x20000000
+#define PER_CR9_EVENT_STORE_REAL 0x08000000
+#define PER_CR9_EVENT_NULLIFICATION 0x01000000
+#define PER_CR9_CONTROL_BRANCH_ADDRESS 0x00800000
+#define PER_CR9_CONTROL_ALTERATION 0x00200000
+
+/* PER bits from the PER CODE/ATMID/AI in lowcore */
+#define PER_CODE_EVENT_BRANCH 0x8000
+#define PER_CODE_EVENT_IFETCH 0x4000
+#define PER_CODE_EVENT_STORE 0x2000
+#define PER_CODE_EVENT_STORE_REAL 0x0800
+#define PER_CODE_EVENT_NULLIFICATION 0x0100
+
#ifndef CONFIG_USER_ONLY
/* In several cases of runtime exceptions, we havn't recorded the true
instruction length. Use these codes when raising exceptions in order