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author | Aurelien Jarno <aurelien@aurel32.net> | 2015-06-13 00:46:00 +0200 |
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committer | Alexander Graf <agraf@suse.de> | 2015-06-17 12:40:52 +0200 |
commit | 311918b979c5364c30392c1054ed77d047a83953 (patch) | |
tree | 3ca255bed7666787a2bf045a26a696b4dab97b67 /target-s390x/cpu.c | |
parent | 8d302e76755b8157373073d7107e31b0b13f80c1 (diff) |
target-s390x: PER storage-alteration event support
For the PER storage-alteration event we can use the QEMU watchpoint
infrastructure. When PER is enabled or PER control register changed we
enable the corresponding watchpoints. When a watchpoint arises we can
save the event. Unfortunately the current code does not provide the
address space used to trigger the watchpoint. For now we assume it comes
from the default ASC.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-s390x/cpu.c')
-rw-r--r-- | target-s390x/cpu.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target-s390x/cpu.c b/target-s390x/cpu.c index ba7a887eea..4daf6439f5 100644 --- a/target-s390x/cpu.c +++ b/target-s390x/cpu.c @@ -343,6 +343,7 @@ static void s390_cpu_class_init(ObjectClass *oc, void *data) cc->write_elf64_note = s390_cpu_write_elf64_note; cc->write_elf64_qemunote = s390_cpu_write_elf64_qemunote; cc->cpu_exec_interrupt = s390_cpu_exec_interrupt; + cc->debug_excp_handler = s390x_cpu_debug_excp_handler; #endif cc->gdb_num_core_regs = S390_NUM_CORE_REGS; cc->gdb_core_xml_file = "s390x-core64.xml"; |