diff options
| author | Tom Musta <tommusta@gmail.com> | 2014-08-25 14:25:40 -0500 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2014-09-08 12:50:53 +0200 |
| commit | 8979c2f602357129fdf07a5cf8484ca430928b47 (patch) | |
| tree | 7160fbe20d109c3ca8a505411693aa2dc5ac0a3a /target-ppc | |
| parent | ab92678d0a24e7ef8d4d93d18e5c0df8619874fe (diff) | |
target-ppc: Optimize rlwinm MB=0 ME=31
Optimize the special case of rlwinm where MB=0 and ME=31. This can
be implemented as a 32-bit ROTL.
Signed-off-by: Tom Musta <tommusta@gmail.com>
Suggested-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc')
| -rw-r--r-- | target-ppc/translate.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 095b83c147..889e37d272 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -1691,6 +1691,12 @@ static void gen_rlwinm(DisasContext *ctx) tcg_gen_shri_tl(t0, t0, mb); tcg_gen_ext32u_tl(cpu_gpr[rA(ctx->opcode)], t0); tcg_temp_free(t0); + } else if (likely(mb == 0 && me == 31)) { + TCGv_i32 t0 = tcg_temp_new_i32(); + tcg_gen_trunc_tl_i32(t0, cpu_gpr[rS(ctx->opcode)]); + tcg_gen_rotli_i32(t0, t0, sh); + tcg_gen_extu_i32_tl(cpu_gpr[rA(ctx->opcode)], t0); + tcg_temp_free_i32(t0); } else { TCGv t0 = tcg_temp_new(); #if defined(TARGET_PPC64) |