diff options
author | malc <malc@c046a42c-6fe2-441c-8c8c-71466251a162> | 2009-03-02 22:39:39 +0000 |
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committer | malc <malc@c046a42c-6fe2-441c-8c8c-71466251a162> | 2009-03-02 22:39:39 +0000 |
commit | 8dd640e49daeba4a47c1f9e75e0f09aeb5578644 (patch) | |
tree | 43ac1edf3610b97d5bcb4b603740216b20591d98 /target-ppc | |
parent | 66c7c80657e6b7ca42a7eb7aff28bebfef030b87 (diff) |
Fix mtcrf/mfcr
Noticed by Alexander Graf
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6667 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc')
-rw-r--r-- | target-ppc/translate.c | 22 |
1 files changed, 13 insertions, 9 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 2a06e4c76c..8e0b2e04ed 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -3843,9 +3843,11 @@ GEN_HANDLER(mfcr, 0x1F, 0x13, 0x00, 0x00000801, PPC_MISC) if (likely(ctx->opcode & 0x00100000)) { crm = CRM(ctx->opcode); - if (likely((crm ^ (crm - 1)) == 0)) { - crn = ffs(crm); + if (likely(crm && ((crm & (crm - 1)) == 0))) { + crn = ffs (crm) - 1; tcg_gen_extu_i32_tl(cpu_gpr[rD(ctx->opcode)], cpu_crf[7 - crn]); + tcg_gen_shli_i32(cpu_gpr[rD(ctx->opcode)], + cpu_gpr[rD(ctx->opcode)], crn * 4); } } else { gen_helper_load_cr(cpu_gpr[rD(ctx->opcode)]); @@ -3935,13 +3937,15 @@ GEN_HANDLER(mtcrf, 0x1F, 0x10, 0x04, 0x00000801, PPC_MISC) uint32_t crm, crn; crm = CRM(ctx->opcode); - if (likely((ctx->opcode & 0x00100000) || (crm ^ (crm - 1)) == 0)) { - TCGv_i32 temp = tcg_temp_new_i32(); - crn = ffs(crm); - tcg_gen_trunc_tl_i32(temp, cpu_gpr[rS(ctx->opcode)]); - tcg_gen_shri_i32(cpu_crf[7 - crn], temp, crn * 4); - tcg_gen_andi_i32(cpu_crf[7 - crn], cpu_crf[7 - crn], 0xf); - tcg_temp_free_i32(temp); + if (likely((ctx->opcode & 0x00100000))) { + if (crm && ((crm & (crm - 1)) == 0)) { + TCGv_i32 temp = tcg_temp_new_i32(); + crn = ffs (crm) - 1; + tcg_gen_trunc_tl_i32(temp, cpu_gpr[rS(ctx->opcode)]); + tcg_gen_shri_i32(cpu_crf[7 - crn], temp, crn * 4); + tcg_gen_andi_i32(cpu_crf[7 - crn], cpu_crf[7 - crn], 0xf); + tcg_temp_free_i32(temp); + } } else { TCGv_i32 temp = tcg_const_i32(crm); gen_helper_store_cr(cpu_gpr[rS(ctx->opcode)], temp); |