diff options
| author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-12-05 07:21:31 +0000 |
|---|---|---|
| committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-12-05 07:21:31 +0000 |
| commit | 54cdcae646bdc4b87b2355ba7d9aab85c39b2c31 (patch) | |
| tree | f7fee4fda16d36fc6f7ef246d95e08040dd15a49 /target-ppc | |
| parent | b2b183c2700d40210df51ff3ec9a2568ce9f5a43 (diff) | |
target-ppc: add functions to load/store SPR
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5881 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc')
| -rw-r--r-- | target-ppc/translate.c | 15 |
1 files changed, 13 insertions, 2 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 0ab698711f..bb0b79d5ff 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -688,6 +688,17 @@ OPCODES_SECTION opcode_t opc_##name = { \ .oname = stringify(name), \ } +/* SPR load/store helpers */ +static always_inline void gen_load_spr(TCGv t, int reg) +{ + tcg_gen_ld_tl(t, cpu_env, offsetof(CPUState, spr[reg])); +} + +static always_inline void gen_store_spr(int reg, TCGv t) +{ + tcg_gen_st_tl(t, cpu_env, offsetof(CPUState, spr[reg])); +} + /* Start opcode list */ GEN_OPCODE_MARK(start); @@ -1550,10 +1561,10 @@ GEN_HANDLER(or, 0x1F, 0x1C, 0x0D, 0x00000000, PPC_INTEGER) } if (prio) { TCGv t0 = tcg_temp_new(); - tcg_gen_ld_tl(t0, cpu_env, offsetof(CPUState, spr[SPR_PPR])); + gen_load_spr(t0, SPR_PPR); tcg_gen_andi_tl(t0, t0, ~0x001C000000000000ULL); tcg_gen_ori_tl(t0, t0, ((uint64_t)prio) << 50); - tcg_gen_st_tl(t0, cpu_env, offsetof(CPUState, spr[SPR_PPR])); + gen_store_spr(SPR_PPR, t0); tcg_temp_free(t0); } #endif |