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| author | pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-06-30 16:31:04 +0000 |
|---|---|---|
| committer | pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-06-30 16:31:04 +0000 |
| commit | b3c7724cbc70109630227c92df2d59deca4dab64 (patch) | |
| tree | 52e335302d10fc433761851c312dbff9e820d661 /target-ppc | |
| parent | 6913ba56807e5a5275bd839550e8a951d2ef63af (diff) | |
Move CPU save/load registration to common code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4808 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc')
| -rw-r--r-- | target-ppc/cpu.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index d9dcf58ef3..4e1f2f14f4 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -813,6 +813,8 @@ int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val); #define cpu_signal_handler cpu_ppc_signal_handler #define cpu_list ppc_cpu_list +#define CPU_SAVE_VERSION 3 + /* MMU modes definitions */ #define MMU_MODE0_SUFFIX _user #define MMU_MODE1_SUFFIX _kernel |