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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2016-07-27 16:56:38 +1000
committerDavid Gibson <david@gibson.dropbear.id.au>2016-09-07 12:40:10 +1000
commit72073dcce0ad1e84b866e45bc60ccf459aa9fcd4 (patch)
treecad32118f4716bf9a2d19f574ada0542a31eb14c /target-ppc
parent8c8966e2188ade13c4ab9d3f8f4b12c99be0ade4 (diff)
ppc: Don't update NIP on conditional trap instructions
This is no longer necessary as the helpers will properly retrieve the return address when needed. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target-ppc')
-rw-r--r--target-ppc/excp_helper.c6
-rw-r--r--target-ppc/translate.c8
2 files changed, 4 insertions, 10 deletions
diff --git a/target-ppc/excp_helper.c b/target-ppc/excp_helper.c
index d31eece4dd..882d529dbe 100644
--- a/target-ppc/excp_helper.c
+++ b/target-ppc/excp_helper.c
@@ -1031,7 +1031,8 @@ void helper_tw(CPUPPCState *env, target_ulong arg1, target_ulong arg2,
((int32_t)arg1 == (int32_t)arg2 && (flags & 0x04)) ||
((uint32_t)arg1 < (uint32_t)arg2 && (flags & 0x02)) ||
((uint32_t)arg1 > (uint32_t)arg2 && (flags & 0x01))))) {
- raise_exception_err(env, POWERPC_EXCP_PROGRAM, POWERPC_EXCP_TRAP);
+ raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM,
+ POWERPC_EXCP_TRAP, GETPC());
}
}
@@ -1044,7 +1045,8 @@ void helper_td(CPUPPCState *env, target_ulong arg1, target_ulong arg2,
((int64_t)arg1 == (int64_t)arg2 && (flags & 0x04)) ||
((uint64_t)arg1 < (uint64_t)arg2 && (flags & 0x02)) ||
((uint64_t)arg1 > (uint64_t)arg2 && (flags & 0x01))))) {
- raise_exception_err(env, POWERPC_EXCP_PROGRAM, POWERPC_EXCP_TRAP);
+ raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM,
+ POWERPC_EXCP_TRAP, GETPC());
}
}
#endif
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index f75cdc6bb6..93cd98c6ad 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -3580,8 +3580,6 @@ static void gen_sc(DisasContext *ctx)
static void gen_tw(DisasContext *ctx)
{
TCGv_i32 t0 = tcg_const_i32(TO(ctx->opcode));
- /* Update the nip since this might generate a trap exception */
- gen_update_nip(ctx, ctx->nip - 4);
gen_helper_tw(cpu_env, cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)],
t0);
tcg_temp_free_i32(t0);
@@ -3592,8 +3590,6 @@ static void gen_twi(DisasContext *ctx)
{
TCGv t0 = tcg_const_tl(SIMM(ctx->opcode));
TCGv_i32 t1 = tcg_const_i32(TO(ctx->opcode));
- /* Update the nip since this might generate a trap exception */
- gen_update_nip(ctx, ctx->nip - 4);
gen_helper_tw(cpu_env, cpu_gpr[rA(ctx->opcode)], t0, t1);
tcg_temp_free(t0);
tcg_temp_free_i32(t1);
@@ -3604,8 +3600,6 @@ static void gen_twi(DisasContext *ctx)
static void gen_td(DisasContext *ctx)
{
TCGv_i32 t0 = tcg_const_i32(TO(ctx->opcode));
- /* Update the nip since this might generate a trap exception */
- gen_update_nip(ctx, ctx->nip - 4);
gen_helper_td(cpu_env, cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)],
t0);
tcg_temp_free_i32(t0);
@@ -3616,8 +3610,6 @@ static void gen_tdi(DisasContext *ctx)
{
TCGv t0 = tcg_const_tl(SIMM(ctx->opcode));
TCGv_i32 t1 = tcg_const_i32(TO(ctx->opcode));
- /* Update the nip since this might generate a trap exception */
- gen_update_nip(ctx, ctx->nip - 4);
gen_helper_td(cpu_env, cpu_gpr[rA(ctx->opcode)], t0, t1);
tcg_temp_free(t0);
tcg_temp_free_i32(t1);