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authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2009-01-04 22:08:58 +0000
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2009-01-04 22:08:58 +0000
commit07ef34c35eea5d25b873b614078ee8092a3631a5 (patch)
treec0731c5da83dd1ac4a343044c1a0e918a5a8b87e /target-ppc
parent2c2779080c2dbdeaefca59742be9648dd1878044 (diff)
Add vsr{,a}{b,h,w} instructions.
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6165 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc')
-rw-r--r--target-ppc/helper.h6
-rw-r--r--target-ppc/op_helper.c18
-rw-r--r--target-ppc/translate.c6
3 files changed, 30 insertions, 0 deletions
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index 3b44b97803..025679010c 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -137,6 +137,12 @@ DEF_HELPER_3(vmulosb, void, avr, avr, avr)
DEF_HELPER_3(vmulosh, void, avr, avr, avr)
DEF_HELPER_3(vmuloub, void, avr, avr, avr)
DEF_HELPER_3(vmulouh, void, avr, avr, avr)
+DEF_HELPER_3(vsrab, void, avr, avr, avr)
+DEF_HELPER_3(vsrah, void, avr, avr, avr)
+DEF_HELPER_3(vsraw, void, avr, avr, avr)
+DEF_HELPER_3(vsrb, void, avr, avr, avr)
+DEF_HELPER_3(vsrh, void, avr, avr, avr)
+DEF_HELPER_3(vsrw, void, avr, avr, avr)
DEF_HELPER_1(efscfsi, i32, i32)
DEF_HELPER_1(efscfui, i32, i32)
diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c
index 4a548ea136..648c50f63f 100644
--- a/target-ppc/op_helper.c
+++ b/target-ppc/op_helper.c
@@ -2088,6 +2088,24 @@ VMUL(uh, u16, u32)
#undef VMUL_DO
#undef VMUL
+#define VSR(suffix, element) \
+ void helper_vsr##suffix (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
+ { \
+ int i; \
+ for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
+ unsigned int mask = ((1 << (3 + (sizeof (a->element[0]) >> 1))) - 1); \
+ unsigned int shift = b->element[i] & mask; \
+ r->element[i] = a->element[i] >> shift; \
+ } \
+ }
+VSR(ab, s8)
+VSR(ah, s16)
+VSR(aw, s32)
+VSR(b, u8)
+VSR(h, u16)
+VSR(w, u32)
+#undef VSR
+
#undef VECTOR_FOR_INORDER_I
#undef HI_IDX
#undef LO_IDX
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index eed3999105..cd6b5354b7 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -6219,6 +6219,12 @@ GEN_VXFORM(vmuleub, 4, 8);
GEN_VXFORM(vmuleuh, 4, 9);
GEN_VXFORM(vmulesb, 4, 12);
GEN_VXFORM(vmulesh, 4, 13);
+GEN_VXFORM(vsrb, 2, 8);
+GEN_VXFORM(vsrh, 2, 9);
+GEN_VXFORM(vsrw, 2, 10);
+GEN_VXFORM(vsrab, 2, 12);
+GEN_VXFORM(vsrah, 2, 13);
+GEN_VXFORM(vsraw, 2, 14);
/*** SPE extension ***/
/* Register moves */