PowerPC target coding style fixes.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3348 c046a42c-6fe2-441c-8c8c-71466251a162

5 files changed, 20 insertions, 27 deletions

diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index e2d51ec077..ef70fa0347 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -225,7 +225,6 @@ enum {
     POWERPC_EXCP_SYSCALL_USER = 0x203, /* System call in user mode only      */
 };
 
-
 /* Exceptions error codes                                                    */
 enum {
     /* Exception subtypes for POWERPC_EXCP_ALIGN                             */
diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index 205e35f49e..86debbc3c7 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -626,8 +626,8 @@ static int slb_lookup (CPUPPCState *env, target_ulong eaddr,
         tmp = ldl_phys(sr_base + 8);
 #if defined(DEBUG_SLB)
         if (loglevel != 0) {
-        fprintf(logfile, "%s: seg %d " PADDRX " %016" PRIx64 " %08" PRIx32 "\n",
-                __func__, n, sr_base, tmp64, tmp);
+            fprintf(logfile, "%s: seg %d " PADDRX " %016" PRIx64 " %08"
+                    PRIx32 "\n", __func__, n, sr_base, tmp64, tmp);
         }
 #endif
         if (tmp64 & 0x0000000008000000ULL) {
@@ -869,25 +869,25 @@ static int get_segment (CPUState *env, mmu_ctx_t *ctx,
                 }
             }
 #if defined (DEBUG_MMU)
-                    if (loglevel != 0) {
-                        target_phys_addr_t curaddr;
-                        uint32_t a0, a1, a2, a3;
+            if (loglevel != 0) {
+                target_phys_addr_t curaddr;
+                uint32_t a0, a1, a2, a3;
+                fprintf(logfile,
+                        "Page table: " PADDRX " len " PADDRX "\n",
+                        sdr, mask + 0x80);
+                for (curaddr = sdr; curaddr < (sdr + mask + 0x80);
+                     curaddr += 16) {
+                    a0 = ldl_phys(curaddr);
+                    a1 = ldl_phys(curaddr + 4);
+                    a2 = ldl_phys(curaddr + 8);
+                    a3 = ldl_phys(curaddr + 12);
+                    if (a0 != 0 || a1 != 0 || a2 != 0 || a3 != 0) {
                         fprintf(logfile,
-                                "Page table: " PADDRX " len " PADDRX "\n",
-                                sdr, mask + 0x80);
-                        for (curaddr = sdr; curaddr < (sdr + mask + 0x80);
-                             curaddr += 16) {
-                            a0 = ldl_phys(curaddr);
-                            a1 = ldl_phys(curaddr + 4);
-                            a2 = ldl_phys(curaddr + 8);
-                            a3 = ldl_phys(curaddr + 12);
-                            if (a0 != 0 || a1 != 0 || a2 != 0 || a3 != 0) {
-                                fprintf(logfile,
-                                        PADDRX ": %08x %08x %08x %08x\n",
-                                        curaddr, a0, a1, a2, a3);
-                            }
-                        }
+                                PADDRX ": %08x %08x %08x %08x\n",
+                                curaddr, a0, a1, a2, a3);
                     }
+                }
+            }
 #endif
         } else {
 #if defined (DEBUG_MMU)
@@ -1714,7 +1714,6 @@ void do_store_dbatl (CPUPPCState *env, int nr, target_ulong value)
     env->DBAT[1][nr] = value;
 }
 
-
 /*****************************************************************************/
 /* TLB management */
 void ppc_tlb_invalidate_all (CPUPPCState *env)
@@ -1843,7 +1842,6 @@ void ppc_slb_invalidate_one (CPUPPCState *env, uint64_t T0)
 }
 #endif
 
-
 /*****************************************************************************/
 /* Special registers manipulation */
 #if defined(TARGET_PPC64)
diff --git a/target-ppc/op.c b/target-ppc/op.c
index 2dc058efb1..1412c09ae0 100644
--- a/target-ppc/op.c
+++ b/target-ppc/op.c
@@ -120,7 +120,6 @@
 #define REG 31
 #include "op_template.h"
 
-
 void OPPROTO op_print_mem_EA (void)
 {
     do_print_mem_EA(T0);
@@ -1426,7 +1425,6 @@ void OPPROTO op_andi_T1_64 (void)
 }
 #endif
 
-
 /* count leading zero */
 void OPPROTO op_cntlzw (void)
 {
diff --git a/target-ppc/op_mem.h b/target-ppc/op_mem.h
index 60c043386a..ea1b4a3472 100644
--- a/target-ppc/op_mem.h
+++ b/target-ppc/op_mem.h
@@ -482,7 +482,6 @@ static always_inline void glue(stfiwxr, MEMSUFFIX) (target_ulong EA, double d)
     glue(stl, MEMSUFFIX)(EA, u.u);
 }
 
-
 PPC_STF_OP(fd_le, stfqr);
 PPC_STF_OP(fs_le, stfsr);
 PPC_STF_OP(fiwx_le, stfiwxr);
@@ -1079,7 +1078,6 @@ _PPC_SPE_LD_OP_64(name, op)
 _PPC_SPE_LD_OP(name, op)
 #endif
 
-
 #define _PPC_SPE_ST_OP(name, op)                                              \
 void OPPROTO glue(glue(op_spe_st, name), MEMSUFFIX) (void)                    \
 {                                                                             \
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 59d032d26b..1ff4b17bbe 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -6566,7 +6566,7 @@ static always_inline int gen_intermediate_code_internal (CPUState *env,
         branch_step = 1;
     else
         branch_step = 0;
-    ctx.singlestep_enabled = env->singlestep_enabled || single_step == 1;;
+    ctx.singlestep_enabled = env->singlestep_enabled || single_step == 1;
 #if defined (DO_SINGLE_STEP) && 0
     /* Single step trace mode */
     msr_se = 1;