diff options
| author | Laurent Vivier <lvivier@redhat.com> | 2016-03-16 10:43:52 +0100 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2016-03-24 11:17:33 +1100 |
| commit | 8b9f2118ca40b1de72d8f75b59a5fb4d347a69f7 (patch) | |
| tree | 5b6408ea478a323baf969db309365a7891d6edb6 /target-ppc | |
| parent | 2538039f2c26d66053426fb547e4f25e669baf62 (diff) | |
ppc64: set MSR_SF bit
When a qemu-system-ppc64 is started, the 64-bit mode bit
is not set in MSR.
Signed-off-by: Laurent Vivier <lvivier@redhat.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target-ppc')
| -rw-r--r-- | target-ppc/translate_init.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index fb206aff29..11d5fd37b4 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -9703,7 +9703,7 @@ static void ppc_cpu_reset(CPUState *s) #if defined(TARGET_PPC64) if (env->mmu_model & POWERPC_MMU_64) { - env->msr |= (1ULL << MSR_SF); + msr |= (1ULL << MSR_SF); } #endif |