diff options
author | Anthony Liguori <aliguori@us.ibm.com> | 2013-06-28 11:48:09 -0500 |
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committer | Anthony Liguori <aliguori@us.ibm.com> | 2013-06-28 11:48:09 -0500 |
commit | 8a9c98aedc1a3fb4dfbebeccc926e273df54f2ba (patch) | |
tree | b800dd8b6131717bf397103ec4d7199f67ea0c5c /target-ppc | |
parent | 36125631e79d53ffb9365740f43f386e2171d116 (diff) | |
parent | c658b94f6e8c206c59d02aa6fbac285b86b53d2c (diff) |
Merge remote-tracking branch 'afaerber/qom-cpu' into staging
# By Andreas Färber
# Via Andreas Färber
* afaerber/qom-cpu: (24 commits)
cpu: Turn cpu_unassigned_access() into a CPUState hook
hwaddr: Make hwaddr type usable beyond softmmu
cpu: Change qemu_init_vcpu() argument to CPUState
cpus: Change qemu_dummy_start_vcpu() argument to CPUState
cpus: Change qemu_kvm_start_vcpu() argument to CPUState
cpus: Change cpu_handle_guest_debug() argument to CPUState
gdbstub: Set gdb_set_stop_cpu() argument to CPUState
kvm: Change kvm_cpu_exec() argument to CPUState
kvm: Change kvm_handle_internal_error() argument to CPUState
cpu: Turn cpu_dump_{state,statistics}() into CPUState hooks
cpus: Change qemu_kvm_init_cpu_signals() argument to CPUState
kvm: Change kvm_set_signal_mask() argument to CPUState
cpus: Change qemu_kvm_wait_io_event() argument to CPUState
cpus: Change cpu_thread_is_idle() argument to CPUState
cpu: Change cpu_exit() argument to CPUState
kvm: Change cpu_synchronize_state() argument to CPUState
kvm: Change kvm_cpu_synchronize_state() argument to CPUState
gdbstub: Simplify find_cpu()
cpu: Guard cpu_{save,load}() definitions
target-openrisc: Register VMStateDescription for OpenRISCCPU
...
Diffstat (limited to 'target-ppc')
-rw-r--r-- | target-ppc/cpu-qom.h | 4 | ||||
-rw-r--r-- | target-ppc/mmu-hash64.c | 2 | ||||
-rw-r--r-- | target-ppc/translate.c | 15 | ||||
-rw-r--r-- | target-ppc/translate_init.c | 4 |
4 files changed, 16 insertions, 9 deletions
diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h index eb03a00799..84ba1054d5 100644 --- a/target-ppc/cpu-qom.h +++ b/target-ppc/cpu-qom.h @@ -101,5 +101,9 @@ static inline PowerPCCPU *ppc_env_get_cpu(CPUPPCState *env) PowerPCCPUClass *ppc_cpu_class_by_pvr(uint32_t pvr); void ppc_cpu_do_interrupt(CPUState *cpu); +void ppc_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, + int flags); +void ppc_cpu_dump_statistics(CPUState *cpu, FILE *f, + fprintf_function cpu_fprintf, int flags); #endif diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c index 43ccf456e3..5c67ec3e9c 100644 --- a/target-ppc/mmu-hash64.c +++ b/target-ppc/mmu-hash64.c @@ -78,7 +78,7 @@ void dump_slb(FILE *f, fprintf_function cpu_fprintf, CPUPPCState *env) int i; uint64_t slbe, slbv; - cpu_synchronize_state(env); + cpu_synchronize_state(CPU(ppc_env_get_cpu(env))); cpu_fprintf(f, "SLB\tESID\t\t\tVSID\n"); for (i = 0; i < env->slb_nr; i++) { diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 4590c6f5fb..3643863d53 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -9526,15 +9526,17 @@ GEN_SPEOP_LDST(evstwwo, 0x1E, 2), /*****************************************************************************/ /* Misc PowerPC helpers */ -void cpu_dump_state (CPUPPCState *env, FILE *f, fprintf_function cpu_fprintf, - int flags) +void ppc_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, + int flags) { #define RGPL 4 #define RFPL 4 + PowerPCCPU *cpu = POWERPC_CPU(cs); + CPUPPCState *env = &cpu->env; int i; - cpu_synchronize_state(env); + cpu_synchronize_state(cs); cpu_fprintf(f, "NIP " TARGET_FMT_lx " LR " TARGET_FMT_lx " CTR " TARGET_FMT_lx " XER " TARGET_FMT_lx "\n", @@ -9675,14 +9677,15 @@ void cpu_dump_state (CPUPPCState *env, FILE *f, fprintf_function cpu_fprintf, #undef RFPL } -void cpu_dump_statistics (CPUPPCState *env, FILE*f, fprintf_function cpu_fprintf, - int flags) +void ppc_cpu_dump_statistics(CPUState *cs, FILE*f, + fprintf_function cpu_fprintf, int flags) { #if defined(DO_PPC_STATISTICS) + PowerPCCPU *cpu = POWERPC_CPU(cs); opc_handler_t **t1, **t2, **t3, *handler; int op1, op2, op3; - t1 = env->opcodes; + t1 = cpu->env.opcodes; for (op1 = 0; op1 < 64; op1++) { handler = t1[op1]; if (is_indirect_opcode(handler)) { diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 021a31e209..fa5e09fb36 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -7752,8 +7752,6 @@ static void ppc_cpu_realizefn(DeviceState *dev, Error **errp) 34, "power-spe.xml", 0); } - qemu_init_vcpu(env); - pcc->parent_realize(dev, errp); #if defined(PPC_DUMP_CPU) @@ -8309,6 +8307,8 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data) cc->class_by_name = ppc_cpu_class_by_name; cc->do_interrupt = ppc_cpu_do_interrupt; + cc->dump_state = ppc_cpu_dump_state; + cc->dump_statistics = ppc_cpu_dump_statistics; } static const TypeInfo ppc_cpu_type_info = { |