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authorblueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>2009-03-07 20:57:42 +0000
committerblueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>2009-03-07 20:57:42 +0000
commit8eee0af947cafdce5668abb6b7545f3887624ba8 (patch)
tree7f48494591bdbc19a040f5412637e80abfc8b251 /target-ppc/translate_init.c
parente47ce3f2440368a5dac209b910e361658cb601f0 (diff)
Keep SLB in-CPU
Real 970 CPUs have the SLB not memory backed, but inside the CPU. This breaks bridge mode for 970 for now, but at least keeps us from overwriting physical addresses 0x0 - 0x300, rendering our interrupt handlers useless. I put in a stub for bridge mode operation that could be enabled easily, but for now it's safer to leave that off I guess (970fx doesn't have bridge mode AFAIK). Signed-off-by: Alexander Graf <alex@csgraf.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6757 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/translate_init.c')
-rw-r--r--target-ppc/translate_init.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 42e62be292..2fa65153f2 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -6056,7 +6056,7 @@ static void init_proc_970FX (CPUPPCState *env)
&spr_read_generic, &spr_write_generic,
0x00000000);
#if !defined(CONFIG_USER_ONLY)
- env->slb_nr = 32;
+ env->slb_nr = 64;
#endif
init_excp_970(env);
env->dcache_line_size = 128;