diff options
| author | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-04-24 06:44:14 +0000 |
|---|---|---|
| committer | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-04-24 06:44:14 +0000 |
| commit | c294fc587a52f4991b1dcbb328b5a9d09f8c8e2e (patch) | |
| tree | 2d5c28865fd8aa9e511024802a3e2d1fd020c792 /target-ppc/translate_init.c | |
| parent | 9c02f1a2e607b7be71f2dba1cafc096dd3c2dda9 (diff) | |
Improve PowerPC 405 MMU model / share more code for other embedded targets
support.
Fix PowerPC 405 MSR mask.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2717 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/translate_init.c')
| -rw-r--r-- | target-ppc/translate_init.c | 16 |
1 files changed, 13 insertions, 3 deletions
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index d7473fef6d..51332ff4ba 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -355,6 +355,17 @@ static void spr_write_40x_dbcr0 (void *opaque, int sprn) RET_STOP(ctx); } +static void spr_write_40x_sler (void *opaque, int sprn) +{ + DisasContext *ctx = opaque; + + gen_op_store_40x_sler(); + /* We must stop the translation as we may have changed + * some regions endianness + */ + RET_STOP(ctx); +} + static void spr_write_booke_tcr (void *opaque, int sprn) { gen_op_store_booke_tcr(); @@ -1711,10 +1722,9 @@ static void gen_spr_405 (CPUPPCState *env) &spr_read_generic, &spr_write_generic, 0x00000000); /* Storage control */ - /* XXX : not implemented */ spr_register(env, SPR_405_SLER, "SLER", SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, + &spr_read_generic, &spr_write_40x_sler, 0x00000000); /* XXX : not implemented */ spr_register(env, SPR_405_SU0R, "SU0R", @@ -2837,7 +2847,7 @@ static ppc_def_t ppc_defs[] = { .pvr_mask = 0xFFFFFFFF, .insns_flags = PPC_INSNS_405, .flags = PPC_FLAGS_405, - .msr_mask = 0x00000000020EFF30ULL, + .msr_mask = 0x00000000000ED630ULL, }, #if defined (TODO) /* PowerPC 405 EZ */ |