spapr: Limit threads per core according to current compatibility mode

This puts a limit to the number of threads per core based on the current
compatibility mode. Although PowerISA specs do not specify the maximum
threads per core number, the linux guest still expects that
PowerISA2.05-compatible CPU supports only 2 threads per core as this
is what POWER6 (2.05 compliant CPU) implements, the same is for
POWER7 (2.06, 4 threads) and POWER8 (2.07, 8 threads).

This calls spapr_fixup_cpu_smt_dt() with the maximum allowed number of
threads which affects ibm,ppc-interrupt-server#s and
ibm,ppc-interrupt-gserver#s properties.

The number of CPU nodesremains unchanged.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Alexander Graf <agraf@suse.de>

1 files changed, 27 insertions, 0 deletions

diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index faac74a33c..56d3b97368 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -8921,6 +8921,33 @@ static void ppc_cpu_unrealizefn(DeviceState *dev, Error **errp)
     }
 }
 
+int ppc_get_compat_smt_threads(PowerPCCPU *cpu)
+{
+    int ret = smp_threads;
+    PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
+
+    switch (cpu->cpu_version) {
+    case CPU_POWERPC_LOGICAL_2_05:
+        ret = 2;
+        break;
+    case CPU_POWERPC_LOGICAL_2_06:
+        ret = 4;
+        break;
+    case CPU_POWERPC_LOGICAL_2_07:
+        ret = 8;
+        break;
+    default:
+        if (pcc->pcr_mask & PCR_COMPAT_2_06) {
+            ret = 4;
+        } else if (pcc->pcr_mask & PCR_COMPAT_2_05) {
+            ret = 2;
+        }
+        break;
+    }
+
+    return MIN(ret, smp_threads);
+}
+
 int ppc_set_compat(PowerPCCPU *cpu, uint32_t cpu_version)
 {
     int ret = 0;