diff options
| author | Rajalakshmi Srinivasaraghavan <raji@linux.vnet.ibm.com> | 2016-09-06 10:34:07 +0530 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2016-09-23 10:29:40 +1000 |
| commit | b5d569a1bb033354847c34d2e011fed812ff7428 (patch) | |
| tree | 6ee3d6cd727b304984baf392f7ec44e8ca85318e /target-ppc/translate | |
| parent | e7b1e06fbcb81ac66e2586214a6c42fdf15fadf3 (diff) | |
target-ppc: add vector extract instructions
The following vector extract instructions are added from ISA 3.0.
vextractub - Vector Extract Unsigned Byte
vextractuh - Vector Extract Unsigned Halfword
vextractuw - Vector Extract Unsigned Word
vextractd - Vector Extract Unsigned Doubleword
Signed-off-by: Rajalakshmi Srinivasaraghavan <raji@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target-ppc/translate')
| -rw-r--r-- | target-ppc/translate/vmx-impl.inc.c | 10 | ||||
| -rw-r--r-- | target-ppc/translate/vmx-ops.inc.c | 10 |
2 files changed, 17 insertions, 3 deletions
diff --git a/target-ppc/translate/vmx-impl.inc.c b/target-ppc/translate/vmx-impl.inc.c index 59ae68ab13..8e66ea0a5c 100644 --- a/target-ppc/translate/vmx-impl.inc.c +++ b/target-ppc/translate/vmx-impl.inc.c @@ -664,6 +664,10 @@ static void glue(gen_, name)(DisasContext *ctx) \ GEN_VXFORM_UIMM(vspltb, 6, 8); GEN_VXFORM_UIMM(vsplth, 6, 9); GEN_VXFORM_UIMM(vspltw, 6, 10); +GEN_VXFORM_UIMM_SPLAT(vextractub, 6, 8, 15); +GEN_VXFORM_UIMM_SPLAT(vextractuh, 6, 9, 14); +GEN_VXFORM_UIMM_SPLAT(vextractuw, 6, 10, 12); +GEN_VXFORM_UIMM_SPLAT(vextractd, 6, 11, 8); GEN_VXFORM_UIMM_SPLAT(vinsertb, 6, 12, 15); GEN_VXFORM_UIMM_SPLAT(vinserth, 6, 13, 14); GEN_VXFORM_UIMM_SPLAT(vinsertw, 6, 14, 12); @@ -672,6 +676,12 @@ GEN_VXFORM_UIMM_ENV(vcfux, 5, 12); GEN_VXFORM_UIMM_ENV(vcfsx, 5, 13); GEN_VXFORM_UIMM_ENV(vctuxs, 5, 14); GEN_VXFORM_UIMM_ENV(vctsxs, 5, 15); +GEN_VXFORM_DUAL(vspltb, PPC_NONE, PPC2_ALTIVEC_207, + vextractub, PPC_NONE, PPC2_ISA300); +GEN_VXFORM_DUAL(vsplth, PPC_NONE, PPC2_ALTIVEC_207, + vextractuh, PPC_NONE, PPC2_ISA300); +GEN_VXFORM_DUAL(vspltw, PPC_NONE, PPC2_ALTIVEC_207, + vextractuw, PPC_NONE, PPC2_ISA300); GEN_VXFORM_DUAL(vspltisb, PPC_NONE, PPC2_ALTIVEC_207, vinsertb, PPC_NONE, PPC2_ISA300); GEN_VXFORM_DUAL(vspltish, PPC_NONE, PPC2_ALTIVEC_207, diff --git a/target-ppc/translate/vmx-ops.inc.c b/target-ppc/translate/vmx-ops.inc.c index e6abeaee56..01d36bbb62 100644 --- a/target-ppc/translate/vmx-ops.inc.c +++ b/target-ppc/translate/vmx-ops.inc.c @@ -197,6 +197,13 @@ GEN_VXRFORM_DUAL(vcmpbfp, vcmpgtsd, 3, 15, PPC_ALTIVEC, PPC_NONE) #define GEN_VXFORM_DUAL_INV(name0, name1, opc2, opc3, inval0, inval1, type) \ GEN_OPCODE_DUAL(name0##_##name1, 0x04, opc2, opc3, inval0, inval1, type, \ PPC_NONE) +GEN_VXFORM_DUAL_INV(vspltb, vextractub, 6, 8, 0x00000000, 0x100000, + PPC2_ALTIVEC_207), +GEN_VXFORM_DUAL_INV(vsplth, vextractuh, 6, 9, 0x00000000, 0x100000, + PPC2_ALTIVEC_207), +GEN_VXFORM_DUAL_INV(vspltw, vextractuw, 6, 10, 0x00000000, 0x100000, + PPC2_ALTIVEC_207), +GEN_VXFORM_300_EXT(vextractd, 6, 11, 0x100000), GEN_VXFORM_DUAL_INV(vspltisb, vinsertb, 6, 12, 0x00000000, 0x100000, PPC2_ALTIVEC_207), GEN_VXFORM_DUAL_INV(vspltish, vinserth, 6, 13, 0x00000000, 0x100000, @@ -226,9 +233,6 @@ GEN_VXFORM_NOA(vrfiz, 5, 9), #define GEN_VXFORM_UIMM(name, opc2, opc3) \ GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_ALTIVEC) -GEN_VXFORM_UIMM(vspltb, 6, 8), -GEN_VXFORM_UIMM(vsplth, 6, 9), -GEN_VXFORM_UIMM(vspltw, 6, 10), GEN_VXFORM_UIMM(vcfux, 5, 12), GEN_VXFORM_UIMM(vcfsx, 5, 13), GEN_VXFORM_UIMM(vctuxs, 5, 14), |