diff options
| author | Sandipan Das <sandipandas1990@gmail.com> | 2016-07-28 23:44:13 +0530 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2016-09-07 12:40:11 +1000 |
| commit | 217f6b88058fa5509ff721741862e26db071929a (patch) | |
| tree | 51ce6482c3f2478bed5b5379b803168fa6f7052c /target-ppc/translate | |
| parent | 4110b586defd8499041275a9eca66264c344e823 (diff) | |
target-ppc: add dtstsfi[q] instructions
DFP Test Significance Immediate [Quad]
Signed-off-by: Sandipan Das <sandipandas1990@gmail.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target-ppc/translate')
| -rw-r--r-- | target-ppc/translate/dfp-impl.c | 20 | ||||
| -rw-r--r-- | target-ppc/translate/dfp-ops.c | 14 |
2 files changed, 34 insertions, 0 deletions
diff --git a/target-ppc/translate/dfp-impl.c b/target-ppc/translate/dfp-impl.c index bf59951b1f..178d3044a7 100644 --- a/target-ppc/translate/dfp-impl.c +++ b/target-ppc/translate/dfp-impl.c @@ -45,6 +45,24 @@ static void gen_##name(DisasContext *ctx) \ tcg_temp_free_ptr(rb); \ } +#define GEN_DFP_BF_I_B(name) \ +static void gen_##name(DisasContext *ctx) \ +{ \ + TCGv_i32 uim; \ + TCGv_ptr rb; \ + if (unlikely(!ctx->fpu_enabled)) { \ + gen_exception(ctx, POWERPC_EXCP_FPU); \ + return; \ + } \ + gen_update_nip(ctx, ctx->nip - 4); \ + uim = tcg_const_i32(UIMM5(ctx->opcode)); \ + rb = gen_fprp_ptr(rB(ctx->opcode)); \ + gen_helper_##name(cpu_crf[crfD(ctx->opcode)], \ + cpu_env, uim, rb); \ + tcg_temp_free_i32(uim); \ + tcg_temp_free_ptr(rb); \ +} + #define GEN_DFP_BF_A_DCM(name) \ static void gen_##name(DisasContext *ctx) \ { \ @@ -172,6 +190,8 @@ GEN_DFP_BF_A_B(dtstex) GEN_DFP_BF_A_B(dtstexq) GEN_DFP_BF_A_B(dtstsf) GEN_DFP_BF_A_B(dtstsfq) +GEN_DFP_BF_I_B(dtstsfi) +GEN_DFP_BF_I_B(dtstsfiq) GEN_DFP_T_B_U32_U32_Rc(dquai, SIMM5, RMC) GEN_DFP_T_B_U32_U32_Rc(dquaiq, SIMM5, RMC) GEN_DFP_T_A_B_I32_Rc(dqua, RMC) diff --git a/target-ppc/translate/dfp-ops.c b/target-ppc/translate/dfp-ops.c index 7f27d0f286..6ef38e5712 100644 --- a/target-ppc/translate/dfp-ops.c +++ b/target-ppc/translate/dfp-ops.c @@ -1,6 +1,9 @@ #define _GEN_DFP_LONG(name, op1, op2, mask) \ GEN_HANDLER_E(name, 0x3B, op1, op2, mask, PPC_NONE, PPC2_DFP) +#define _GEN_DFP_LONG_300(name, op1, op2, mask) \ +GEN_HANDLER_E(name, 0x3B, op1, op2, mask, PPC_NONE, PPC2_ISA300) + #define _GEN_DFP_LONGx2(name, op1, op2, mask) \ GEN_HANDLER_E(name, 0x3B, op1, 0x00 | op2, mask, PPC_NONE, PPC2_DFP), \ GEN_HANDLER_E(name, 0x3B, op1, 0x10 | op2, mask, PPC_NONE, PPC2_DFP) @@ -14,6 +17,9 @@ GEN_HANDLER_E(name, 0x3B, op1, 0x18 | op2, mask, PPC_NONE, PPC2_DFP) #define _GEN_DFP_QUAD(name, op1, op2, mask) \ GEN_HANDLER_E(name, 0x3F, op1, op2, mask, PPC_NONE, PPC2_DFP) +#define _GEN_DFP_QUAD_300(name, op1, op2, mask) \ +GEN_HANDLER_E(name, 0x3F, op1, op2, mask, PPC_NONE, PPC2_ISA300) + #define _GEN_DFP_QUADx2(name, op1, op2, mask) \ GEN_HANDLER_E(name, 0x3F, op1, 0x00 | op2, mask, PPC_NONE, PPC2_DFP), \ GEN_HANDLER_E(name, 0x3F, op1, 0x10 | op2, mask, PPC_NONE, PPC2_DFP) @@ -48,12 +54,18 @@ _GEN_DFP_QUAD(name, op1, op2, 0x001F0800) #define GEN_DFP_BF_A_B(name, op1, op2) \ _GEN_DFP_LONG(name, op1, op2, 0x00000001) +#define GEN_DFP_BF_A_B_300(name, op1, op2) \ +_GEN_DFP_LONG_300(name, op1, op2, 0x00400001) + #define GEN_DFP_BF_Ap_Bp(name, op1, op2) \ _GEN_DFP_QUAD(name, op1, op2, 0x00610801) #define GEN_DFP_BF_A_Bp(name, op1, op2) \ _GEN_DFP_QUAD(name, op1, op2, 0x00600801) +#define GEN_DFP_BF_A_Bp_300(name, op1, op2) \ +_GEN_DFP_QUAD_300(name, op1, op2, 0x00400001) + #define GEN_DFP_BF_A_DCM(name, op1, op2) \ _GEN_DFP_LONGx2(name, op1, op2, 0x00600001) @@ -119,6 +131,8 @@ GEN_DFP_BF_A_B(dtstex, 0x02, 0x05), GEN_DFP_BF_Ap_Bp(dtstexq, 0x02, 0x05), GEN_DFP_BF_A_B(dtstsf, 0x02, 0x15), GEN_DFP_BF_A_Bp(dtstsfq, 0x02, 0x15), +GEN_DFP_BF_A_B_300(dtstsfi, 0x03, 0x15), +GEN_DFP_BF_A_Bp_300(dtstsfiq, 0x03, 0x15), GEN_DFP_TE_T_B_RMC_Rc(dquai, 0x03, 0x02), GEN_DFP_TE_Tp_Bp_RMC_Rc(dquaiq, 0x03, 0x02), GEN_DFP_T_A_B_RMC_Rc(dqua, 0x03, 0x00), |