diff options
author | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-04-24 06:50:21 +0000 |
---|---|---|
committer | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-04-24 06:50:21 +0000 |
commit | 35cdaad645d7a97e67690582feb1fc3a050c92ad (patch) | |
tree | 9a628a9108b9be0e9ea3a56f8b4b85b9bfcbceb1 /target-ppc/translate.c | |
parent | c294fc587a52f4991b1dcbb328b5a9d09f8c8e2e (diff) |
Code provision for new PowerPC embedded target support with:
- 1 kB page size
- 64 bits GPR
- 64 bits physical address space
- SPE extension support.
Change TARGET_PPCSPE into TARGET_PPCEMB
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2718 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/translate.c')
-rw-r--r-- | target-ppc/translate.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 6e27854bcd..2ea759ad96 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -161,7 +161,7 @@ typedef struct DisasContext { int sf_mode; #endif int fpu_enabled; -#if defined(TARGET_PPCSPE) +#if defined(TARGET_PPCEMB) int spe_enabled; #endif ppc_spr_t *spr_cb; /* Needed to check rights for mfspr/mtspr */ @@ -4761,7 +4761,7 @@ GEN_HANDLER(icbt_440, 0x1F, 0x16, 0x00, 0x03E00001, PPC_BOOKE) */ } -#if defined(TARGET_PPCSPE) +#if defined(TARGET_PPCEMB) /*** SPE extension ***/ /* Register moves */ @@ -5740,7 +5740,7 @@ static inline int gen_intermediate_code_internal (CPUState *env, ctx.sf_mode = msr_sf; #endif ctx.fpu_enabled = msr_fp; -#if defined(TARGET_PPCSPE) +#if defined(TARGET_PPCEMB) ctx.spe_enabled = msr_spe; #endif ctx.singlestep_enabled = env->singlestep_enabled; |