diff options
| author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-12-14 19:34:09 +0000 |
|---|---|---|
| committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-12-14 19:34:09 +0000 |
| commit | 9a819377d80f99a4293fd753dd1e90e6cbd618d2 (patch) | |
| tree | 1631d578390caebcb09e69bd26c801ca816dfd51 /target-ppc/translate.c | |
| parent | b12363e1b7d7454daa21c861290f49de42c2ea71 (diff) | |
target-ppc: fix fcmp{o,u} instructions
The instructions are specified to update the condition register even if
an error is to be signaled because of NaN input.
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6034 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/translate.c')
| -rw-r--r-- | target-ppc/translate.c | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 1d25c82c61..4c4f9efdb2 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -2249,26 +2249,30 @@ GEN_FLOAT_B(rim, 0x08, 0x0F, 1, PPC_FLOAT_EXT); /* fcmpo */ GEN_HANDLER(fcmpo, 0x3F, 0x00, 0x01, 0x00600001, PPC_FLOAT) { + TCGv crf; if (unlikely(!ctx->fpu_enabled)) { gen_exception(ctx, POWERPC_EXCP_FPU); return; } gen_reset_fpstatus(); - gen_helper_fcmpo(cpu_crf[crfD(ctx->opcode)], - cpu_fpr[rA(ctx->opcode)], cpu_fpr[rB(ctx->opcode)]); + crf = tcg_const_i32(crfD(ctx->opcode)); + gen_helper_fcmpo(cpu_fpr[rA(ctx->opcode)], cpu_fpr[rB(ctx->opcode)], crf); + tcg_temp_free(crf); gen_helper_float_check_status(); } /* fcmpu */ GEN_HANDLER(fcmpu, 0x3F, 0x00, 0x00, 0x00600001, PPC_FLOAT) { + TCGv crf; if (unlikely(!ctx->fpu_enabled)) { gen_exception(ctx, POWERPC_EXCP_FPU); return; } gen_reset_fpstatus(); - gen_helper_fcmpu(cpu_crf[crfD(ctx->opcode)], - cpu_fpr[rA(ctx->opcode)], cpu_fpr[rB(ctx->opcode)]); + crf = tcg_const_i32(crfD(ctx->opcode)); + gen_helper_fcmpu(cpu_fpr[rA(ctx->opcode)], cpu_fpr[rB(ctx->opcode)], crf); + tcg_temp_free(crf); gen_helper_float_check_status(); } |