diff options
| author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-12-14 18:40:58 +0000 |
|---|---|---|
| committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-12-14 18:40:58 +0000 |
| commit | 6e35d5243c893200e958ef1b6f25519b62cd7d76 (patch) | |
| tree | ee98a0a71bdfb193eccaacfa41258cf4011fb2a0 /target-ppc/translate.c | |
| parent | 7889270acbee87513172b507bb447e7cc50258e7 (diff) | |
target-ppc: fix mtfsb0 and mtfsb1
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6032 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/translate.c')
| -rw-r--r-- | target-ppc/translate.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 57ea907b72..11a83348a9 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -2355,11 +2355,14 @@ GEN_HANDLER(mtfsb0, 0x3F, 0x06, 0x02, 0x001FF800, PPC_FLOAT) gen_exception(ctx, POWERPC_EXCP_FPU); return; } - crb = 32 - (crbD(ctx->opcode) >> 2); + crb = 31 - crbD(ctx->opcode); gen_optimize_fprf(); gen_reset_fpstatus(); - if (likely(crb != 30 && crb != 29)) - tcg_gen_andi_i32(cpu_fpscr, cpu_fpscr, ~(1 << crb)); + if (likely(crb != FPSCR_FEX && crb != FPSCR_VX)) { + TCGv_i32 t0 = tcg_const_i32(crb); + gen_helper_fpscr_clrbit(t0); + tcg_temp_free_i32(t0); + } if (unlikely(Rc(ctx->opcode) != 0)) { tcg_gen_shri_i32(cpu_crf[1], cpu_fpscr, FPSCR_OX); } @@ -2374,7 +2377,7 @@ GEN_HANDLER(mtfsb1, 0x3F, 0x06, 0x01, 0x001FF800, PPC_FLOAT) gen_exception(ctx, POWERPC_EXCP_FPU); return; } - crb = 32 - (crbD(ctx->opcode) >> 2); + crb = 31 - crbD(ctx->opcode); gen_optimize_fprf(); gen_reset_fpstatus(); /* XXX: we pretend we can only do IEEE floating-point computations */ |