diff options
author | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-09-17 08:21:54 +0000 |
---|---|---|
committer | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-09-17 08:21:54 +0000 |
commit | 3608160206ed55c35be916df0f5d43dccc183513 (patch) | |
tree | 0766f900d5635fb7c8b39bf0b9995f26eda55ffa /target-ppc/translate.c | |
parent | 3b46e6242767a2c770c0aba0a6595e9511623c92 (diff) |
Coding style fixes in PowerPC related code (no functional change):
- avoid useless blanks at EOL.
- avoid tabs.
- fix wrapping lines on 80 chars terminals.
- add missing ';' at macros EOL to avoid confusing auto-identers.
- fix identation.
- Remove historical macros in micro-ops (PARAM, SPARAM, PPC_OP, regs)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3178 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/translate.c')
-rw-r--r-- | target-ppc/translate.c | 21 |
1 files changed, 10 insertions, 11 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 142b76f662..11da036293 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -118,7 +118,7 @@ GEN8(gen_op_store_T1_crf, gen_op_store_T1_crf_crf); GEN8(gen_op_load_fpscr_T0, gen_op_load_fpscr_T0_fpscr); GEN8(gen_op_store_T0_fpscr, gen_op_store_T0_fpscr_fpscr); GEN8(gen_op_clear_fpscr, gen_op_clear_fpscr_fpscr); -static inline void gen_op_store_T0_fpscri(int n, uint8_t param) +static inline void gen_op_store_T0_fpscri (int n, uint8_t param) { gen_op_set_T0(param); gen_op_store_T0_fpscr(n); @@ -1312,7 +1312,7 @@ static inline void gen_rldcl (DisasContext *ctx, int mbn) mb = MB(ctx->opcode) | (mbn << 5); gen_rldnm(ctx, mb, 63); } -GEN_PPC64_R2(rldcl, 0x1E, 0x08) +GEN_PPC64_R2(rldcl, 0x1E, 0x08); /* rldcr - rldcr. */ static inline void gen_rldcr (DisasContext *ctx, int men) { @@ -1321,7 +1321,7 @@ static inline void gen_rldcr (DisasContext *ctx, int men) me = MB(ctx->opcode) | (men << 5); gen_rldnm(ctx, 0, me); } -GEN_PPC64_R2(rldcr, 0x1E, 0x09) +GEN_PPC64_R2(rldcr, 0x1E, 0x09); /* rldimi - rldimi. */ static inline void gen_rldimi (DisasContext *ctx, int mbn, int shn) { @@ -1355,7 +1355,7 @@ static inline void gen_rldimi (DisasContext *ctx, int mbn, int shn) if (unlikely(Rc(ctx->opcode) != 0)) gen_set_Rc0(ctx); } -GEN_PPC64_R4(rldimi, 0x1E, 0x06) +GEN_PPC64_R4(rldimi, 0x1E, 0x06); #endif /*** Integer shift ***/ @@ -2601,8 +2601,7 @@ GEN_HANDLER(stfiwx, 0x1F, 0x17, 0x1E, 0x00000001, PPC_FLOAT) } /*** Branch ***/ - -static inline void gen_goto_tb(DisasContext *ctx, int n, target_ulong dest) +static inline void gen_goto_tb (DisasContext *ctx, int n, target_ulong dest) { TranslationBlock *tb; tb = ctx->tb; @@ -2669,7 +2668,7 @@ GEN_HANDLER(b, 0x12, 0xFF, 0xFF, 0x00000000, PPC_FLOW) #define BCOND_LR 1 #define BCOND_CTR 2 -static inline void gen_bcond(DisasContext *ctx, int type) +static inline void gen_bcond (DisasContext *ctx, int type) { target_ulong target = 0; target_ulong li; @@ -2806,7 +2805,7 @@ static inline void gen_bcond(DisasContext *ctx, int type) #endif gen_op_btest_T1(ctx->nip); gen_op_reset_T0(); - no_test: + no_test: if (ctx->singlestep_enabled) gen_op_debug(); gen_op_exit_tb(); @@ -5585,9 +5584,9 @@ static inline uint32_t load_xer (CPUState *env) (xer_cmp << XER_CMP); } -void cpu_dump_state(CPUState *env, FILE *f, - int (*cpu_fprintf)(FILE *f, const char *fmt, ...), - int flags) +void cpu_dump_state (CPUState *env, FILE *f, + int (*cpu_fprintf)(FILE *f, const char *fmt, ...), + int flags) { #if defined(TARGET_PPC64) || 1 #define FILL "" |