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author | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-11-22 11:00:46 +0000 |
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committer | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-11-22 11:00:46 +0000 |
commit | e7c240035fe1ffbb6efba10e8db002f92459ad00 (patch) | |
tree | f8a91b2a94b661fa9f35b3a2d6df87b2f59a0b89 /target-ppc/translate.c | |
parent | 67d6abff605064317d1922745b2e99ffc57b4a77 (diff) |
Add new sane low-level memory accessors for PowerPC that do proper
size or zero extension, with homogenous names.
Fix load & store strings: those are now endian-sensitive, by definition.
Fix dcbz: must always align the target address to a cache line boundary.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3719 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/translate.c')
-rw-r--r-- | target-ppc/translate.c | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 45e8d1b89f..8c64df7ab0 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -2455,12 +2455,37 @@ GEN_HANDLER(stmw, 0x2F, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) /*** Integer load and store strings ***/ #define op_ldsts(name, start) (*gen_op_##name[ctx->mem_idx])(start) #define op_ldstsx(name, rd, ra, rb) (*gen_op_##name[ctx->mem_idx])(rd, ra, rb) +/* string load & stores are by definition endian-safe */ +#define gen_op_lswi_le_raw gen_op_lswi_raw +#define gen_op_lswi_le_user gen_op_lswi_user +#define gen_op_lswi_le_kernel gen_op_lswi_kernel +#define gen_op_lswi_le_hypv gen_op_lswi_hypv +#define gen_op_lswi_le_64_raw gen_op_lswi_raw +#define gen_op_lswi_le_64_user gen_op_lswi_user +#define gen_op_lswi_le_64_kernel gen_op_lswi_kernel +#define gen_op_lswi_le_64_hypv gen_op_lswi_hypv static GenOpFunc1 *gen_op_lswi[NB_MEM_FUNCS] = { GEN_MEM_FUNCS(lswi), }; +#define gen_op_lswx_le_raw gen_op_lswx_raw +#define gen_op_lswx_le_user gen_op_lswx_user +#define gen_op_lswx_le_kernel gen_op_lswx_kernel +#define gen_op_lswx_le_hypv gen_op_lswx_hypv +#define gen_op_lswx_le_64_raw gen_op_lswx_raw +#define gen_op_lswx_le_64_user gen_op_lswx_user +#define gen_op_lswx_le_64_kernel gen_op_lswx_kernel +#define gen_op_lswx_le_64_hypv gen_op_lswx_hypv static GenOpFunc3 *gen_op_lswx[NB_MEM_FUNCS] = { GEN_MEM_FUNCS(lswx), }; +#define gen_op_stsw_le_raw gen_op_stsw_raw +#define gen_op_stsw_le_user gen_op_stsw_user +#define gen_op_stsw_le_kernel gen_op_stsw_kernel +#define gen_op_stsw_le_hypv gen_op_stsw_hypv +#define gen_op_stsw_le_64_raw gen_op_stsw_raw +#define gen_op_stsw_le_64_user gen_op_stsw_user +#define gen_op_stsw_le_64_kernel gen_op_stsw_kernel +#define gen_op_stsw_le_64_hypv gen_op_stsw_hypv static GenOpFunc1 *gen_op_stsw[NB_MEM_FUNCS] = { GEN_MEM_FUNCS(stsw), }; |